2.For 40-column model
In 910 emulation (ESC + “&” + C1 + A1 + A2) In 3110 emulation (ESC + “&” + A1 + A2)
With ESC (1BH) + ”&” (26H) + {C1} + A1 + A2 code and the pattern data following input, a pattern is registered. Only 910 emulation for { }.
Total 224 characters are available for registration into addresses of 20H~FFH. When two pattern data have registered in the same address, those initially registered are cleared and the new data alone are made valid.
[Recognition of use of upper most bit]
For recognition of use or
C1=0 (00H): Uppermost bit not used.
Other than C1=0: Uppermost bit used.
With 0 set to this parameter while the uppermost bit is in use, ⋅4 enlargement results in incomplete images for which the uppermost part is lacking.
[Setting of addresses]
A1 : Registration starting address (20H~FFH)
A2 : Registration ending address (20H~FFH)
[Pattern data configuration] (For
Pattern data to be registered must consist of 9 bytes per character. That is, pattern data configured by 9 ⋅ 8 dot matrix is broken up into 9 vertically each of which is represented by 1 byte of data. All together, 9 bytes of data are transmitted.
<Example> When transmitting the following pattern data:
In 910 emulation
1 2 3 4 5 6 7 8 9
0
1
2
3
4
5
6
7
1
2
*
*
3
4
*
*
5
6
*
*
7
8
9
41H 22H 55H 08H 41H 00H 41H 00H 00H
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