Clevo D480V manual 963-1 PCI/IDE/HyperZip 1

Schematic Diagrams

B.Schematic Diagrams

Sheet 13 of 42 963-1 (PCI/IDE/ HyperZip)

1 of 4

963-1 (PCI/IDE/HyperZip) 1 of 4

19,20,25 AD[0..31]

AD[0..31]

IDESAA[0..2]

IDESAA[0..2]

14

IDECS#A[0..1]

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

IDECS#A[0..1]

14

IDESAB[0..2]

+1.8VS

IDESAB[0..2]

14

IDECS#B[0..1]

IDECS#B[0..1]

14

R519

0

J5 J4 H2 H1 J3 K4 J2 J1 K5 K2 L3 K1 L1 L4 L5 L2 N5 P2 P3 P4 R2 R3 R1 T1 P5 T2 U1 U2 T3 R5 U3 V1

BGA5A

C699

+3VS

C191

AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0

REQ4#

F1

IDEAVDD

Y4

0.01UF

0.1UF

Y3

REQ3#

F2

PREQ4#

IDEAVSS

RP32

25

REQ2#

REQ2#

E1

PREQ3#

ICHRDYA

W10

ICHRDYA

ICHRDYA

14

FRAME#

1

10

REQ1#

H5

PREQ2#

V10

IDEREQA

1

10

PREQ1#

IDREQA

IDEREQA

14

REQ2#

2

9

TRDY#

19

REQ0#

REQ0#

F3

PCI

Y11

IDEIRQA

SERR#

3

2

9

8

IRDY#

PREQ0#

IIRQA

U12

CBLIDA

IDEIRQA

14

STOP#

4

3

8

7

PLOCK#

GNT4#

H3

CBLIDA

CBLIDA

14

5

4

7

6

DEVSEL#

GNT3#

G1

PGNT4#

V11

IDEIOR#A

IDEIOR#A

14

5

6

25

GNT2#

GNT2#

G2

PGNT3#

IIORA#

Y9

IDEIOW#A

10P8R-2.7K

GNT1#

G3

PGNT2#

IIOWA#

Y10

IDACK#A

IDEIOW#A 14

19

GNT0#

GNT0#

H4

PGNT1#

IDACKA#

IDACK#A

14

PGNT0#

T11

IDESAA2

C/BE#3

IDSAA2

+3VS

19,20,25 C/BE#3

K3

C/BE3#

U11

IDESAA1

C/BE#2

M4

IDSAA1

W11

IDESAA0

RN43

19,20,25 C/BE#2

C/BE#1

P1

C/BE2#

IDSAA0

INTD#

8

1

19,20,25 C/BE#1

C/BE#0

R4

C/BE1#

T12

IDECS#A1

INTA#

7

2

19,20,25 C/BE#0

C/BE0#

IDECSA1#

V12

IDECS#A0

INTB#

6

3

9,10,30 INTA#

INTA#

E3

INTA#

IDECSA0#

INTC#

5

4

INTB#

F4

8P4R-2.2K

19

INTC#

INTC#

E2

INTB#

ICHRDYB

W17

ICHRDYB

ICHRDYB

14

RN44

INTD#

G4

INTC#

Y17

IDEREQB

REQ0#

8

1

25,30

INTD#

INTD#

IDREQB

T16

IDEIRQB

IDEREQB

14

REQ3#

7

2

19,20,25 FRAME#

FRAME#

M3

IIRQB

U17

CBLIDB

IDEIRQB

14

REQ4#

6

3

IRDY#

M1

FRAME#

IDE

CBLIDB

CBLIDB

14

REQ1#

5

4

19,20,25 IRDY#

TRDY#

M2

IRDY#

T14

IDEIOR#B

19,20,25 TRDY#

TRDY#

IIORB#

IDEIOR#B

14

8P4R-4.7K

STOP#

N4

W16

IDEIOW#B

19,25

STOP#

STOP#

IIOWB#

IDEIOW#B

14

4/28 Modify

V16

IDACK#B

GNT1#

SERR#

M5

IDACKB#

IDACK#B

14

R533

4.7K

19,25 SERR#

SERR#

IDESAB2

GNT3#

R539

4.7K

PAR

N3

IDSAB2

Y18

GNT4#

R540

4.7K

19,25

PAR

DEVSEL# N1

PAR

T15

IDESAB1

19,25 DEVSEL#

DEVSEL#

IDSAB1

PLOCK#

N2

V17

IDESAB0

PLOCK#

IDSAB0

PCICLK963

IDECS#B1

4 PCICLK963

Y2

PCICLK

IDECSB1#

U16

PCIRST# R191

33

C3

W18

IDECS#B0

9,10,14,20,22,24,30 PCIRST#

PCIRST#

IDECSB0#

IDEDA0

963-1

IDA0

U10

V9

IDEDA1

IDA1

W8

IDEDA2

ZCLK1

IDA2

T9

IDEDA3

+1.8VS

4

ZCLK1

V20

ZCLK

IDA3

Y7

IDEDA4

IDA4

V7

IDEDA5

9

ZSTB0

ZSTB0

M19

IDA5

Y6

IDEDA6

ZSTB#0

N20

ZSTB0

IDA6

Y5

IDEDA7

R476

9

ZSTB#0

ZSTB1

ZSTB0#

IDA7

W6

IDEDA8

9

ZSTB1

J20

ZSTB1

IDA8

U8

IDEDA9

C625

ZSTB#1

K20

IDA9

W7

IDEDA10

9

ZSTB#1

ZSTB1#

IDA10

150_1%

0.1UF

V8

IDEDA11

IDA11

SZVREF

ZUREQ

U9

IDEDA12

9

ZUREQ

N16

ZUREQ

IDA12

Y8

IDEDA13

ZDREQ

N17

IDA13

T10

IDEDA14

R475

9

ZDREQ

ZDREQ

IDA14

W9

IDEDA15

IDA15

50_1%

C624

SVDDZCMP

R19

VDDZCMP

IDB0

Y16

IDEDB0

IDEDA[0..15]

14

0.1UF

SZCMP_N

N18

V15

IDEDB1

N19

SZCMP_P

ZCMP_N

IDB1

U14

IDEDB2

R18

IDB2

W14

IDEDB3

SVSSZCMP

P18

ZCMP_P

IDB3

V13

IDEDB4

10MIL

VSSZCMP

IDB4

T13

IDEDB5

SZ1XAVDD

IDB5

Y13

IDEDB6

U20

IDB6

Y12

IDEDB7

SZ1XAVSS

U19

Z1XAVDD

IDB7

W12

IDEDB8

SZ4XAVDD

Z1XAVSS

HyperZip1G

IDB8

W13

IDEDB9

+3V

T20

ZVREF

IDB9

U13

IDEDB10

SZ4XAVSS

T19

IDB13

Y15

IDEDB14

Z4XAVDD

IDB10

Y14

IDEDB11

SZVREF

Z4XAVSS

IDB11

V14

IDEDB12

R20

IDB12

W15

IDEDB13

ZAD0 ZAD1 ZAD2 ZAD3 ZAD4 ZAD5 ZAD6 ZAD7 ZAD8 ZAD9 ZAD10 ZAD11 ZAD12 ZAD13 ZAD14 ZAD15 ZAD16

IDB14

U15

IDEDB15

+3V

IDB15

IDEDB[0..15]

14

R547

R548

330K

10K

C744

M18 N19 M17 M16 M20 L16 L20 L18 K18 K19 K17 K16 H20 J18 H19 H18 P20

963

L40

U28

+1.8VS

SUSB#

0.1UF

ZAD0 ZAD1 ZAD2 ZAD3 ZAD4 ZAD5 ZAD6 ZAD7 ZAD8 ZAD9 ZAD10 ZAD11 ZAD12 ZAD13 ZAD14 ZAD15 ZAD16

FCM1608K121

24,28 SUSB#

1

14

D1

Q1

T

1

2

35.64mA

SVDDZCMP

3

6

2

CLR1#

VCC

5

T

4

CLK1

Q1#

T

R477

56 SZCMP_N

PR1#

9

ZAD[0..16]

C617

C133

C147

PRST#

R478

56 SZCMP_P

C743

0.1UF

13

CLR2#

Q2

9

PRST#

19,24,25

10UF/10V

0.1UF

0.01UF

12

8

T

SVSSZCMP

PCIRST#

D2

Q2#

Analog Power supplies of Transzip

11

7

10

CLK2

GND

N7

10MIL

PR2#

function for 96X Chip.

C742

+3VS

0.1UF(R)

74LVC74

L42

+3VS

L41

FCM1608K121

6.49mA

SZ1XAVDD

FCM1608K121

1

2

1

2

7.92mA

SZ4XAVDD

C615

C149

C135

C616

C148

C134

10UF/10V

0.1UF

0.01UF

N9

10MIL

SZ1XAVSS

10UF/10V

0.1UF

0.01UF

N8

10MIL

SZ4XAVSS

B - 14 963-1 (PCI/IDE/HyperZip) 1 of 4 (71-D40U0-D03)