Clevo D480V manual Misc Signals 2, Sheet 14 963-2 Misc Signals

Schematic Diagrams

963-2 (Misc Signals) 2 of 4

Programable on-die pull-high strength for CPU_S: ( Infinite, 150, 110, 56 Ohm)

	3	INIT#	INIT#
			A20M#
	3	A20M#
			SMI#
	3	SMI#
			INTR
	3	INTR
			NMI
	3	NMI
			IGNNE#
	3	IGNNE#
			FERR#
	3	FERR#
			STPCLK#
	3	STPCLK#
			CPUSLP#
	3	CPUSLP#
4	CLKAPIC		CLKAPIC

			22,24	LPC_AD0		LPC_AD0
						LPC_AD1
			22,24	LPC_AD1
						LPC_AD2
			22,24	LPC_AD2
						LPC_AD3
			22,24	LPC_AD3
	22,24 LPC_FRAME#					LPC_FRAME#
						LPC_DRQ#
			22 LPC_DRQ#
						SERIRQ
		19,22,24 SERIRQ
						OSC32KHI
C197		5PF	2
			Y6		R195
C198		15PF	32.768KHZ		10M	OSC32KHO
			1
		18	BATOK		BATOK
					PWRGD
		9,29	PWRGD
					C717	RTCVDD
					0.1UF
							C719
							0.1UF
	4,7,25		SMBDAT		SMBDAT	R193	0
					SMBCLK
	4,7,25		SMBCLK			R192	0
	26	AC_SDIN0			AC_SDIN0
					AC_SDIN1
	20,26	AC_SDIN1
	20,26	AC_SDOUT			R197		0
	20,26	AC_SYNC			R531		0
	20,26	AC_RST#			AC_RST#
					AC_BCLK
	20,26	AC_BCLK
			4	REFCLK1			REFCLK1
	R152						SENTEST
			10K
							PCBEEP
+3V			29	PCBEEP
24	FROM H8			PWRBTN#		961PME#
	PWRBTN#
	28,29 PSON#					PSON#
						AUXOK
9,24,27,28	AUXOK
							T
				C190
				0.1UF
							FOR C4
36 PM_DPRSLPVR					R536	0	DPERSLP
				+3V	R178		4.7K
24	EXTSMI#		EXTSMI#		C		A
					D17	1SS355
			GMUXSEL		R513	4.7K
				+3V
2 PM_CPUPERF#			PM_CPUPERF#		R163	0
				+3VS	R149	4.7K
29	VGATE		VGATE

GPIO18

PCBEEP( LPC addr mapping)		+3VS
SB Hardware Trap
PCBEEP R196	4.7K

					BGA5B
				OSC25MHI	A8	R166		4.7K
T18	INIT#			OSC25MHO	A9
P16
	A20M#
R17				TXCLK	A6
	SMI#
R16		CPU_S
	INTR
Y20
	NMI
U18				TXEN	B6
	IGNNE#
T17
	FERR#
W20	STPCLK#
V19				TXD0	E8
	CPUSLP#
Y19	APICD1/GPIOFF#APIC					2	2		9	9
V18	APICCK/LDTREQ#			TXD1	D7		RP16
W19	APICD0/THERM2#					1	1	10		10
				TXD2	C6	3	3		8	8
						4				7
							4		7
V5						5				6
	LAD0						5		6
T7					B4
	LAD1			TXD3
U6		LPC					10P8R-10K
W5	LAD2
	LAD3
W4	LFRAME#			RXCLK	A7
U7	LDRQ#
V6
	SIRQ				C7
				RXDV
C2			MII	RXER	C8
	OSC32KHI
D2	OSC32KHO	RTC		RXD0	D8	8	RP25		2	3
D3	BATOK						9
D1					A5	10	10		1	1
	PWROK			RXD1
						9				2
					B5	7	8		3	4
				RXD2			7		4
C1						6				5
	RTCVDD						6		5
		963-2
E4	RTCVSS			COL	A4
					B7
				RXD3			10P8R-10K
B2	GPIO19	GPIO
A1
	GPIO20			CRS	E9
				MDC	C5	R521		10K
A2	AC_SDIN0			MDIO	E7	R520		10K		+3V
D5
	AC_SDIN1

W2

AC_SDOUT

AC97

MIIAVDD

B9

T5

AC_SYNC

MIIAVSS

B8

C702

C684

D6

AC_RESET#

0.1UF

0.01UF

Y1

AC_BIT_CLK

GPIO0

V2

T

W3

OSCI

GPIO1/LDRQ1#

T8

GATE_LID_SW

GATE_LID_SW

11

G5

ENTEST

V3

SPK

T4

ATF_INT#

A14

ACPI

GPIO

GPIO2/THERM#

R153

4.7K

+3VS

PWRBTN#

A3

D29

1N4148(R)

B14

PME#

EXTSMI#

D14

PSON#

GPIO3/EXTSMI#

T6

A

C

AUXOK

/others

W1

ID0

R530

0(R)

LCDID0

A15

LCDID0

11,30

ACPILED

GPIO4/CLKRUN#

U5

ID1

R512

0(R)

LCDID1

GPIO5/PREQ5#

LCDID1

11,30

B1

U4

ID2

R187

0(R)

LCDID2

GPIO13

GPIO6/PGNT5#

LCDID2

11,27,30

E5

C4

R185

0

SCI#

GPIO14

GPIO7

SCI#

24

R177

4.7K(R)

C14

+3V

E13

GPIO8/RING

R164

0

WAKE-UP

WAKE-UP24

GPIO15/KBDAT

KBC

LAN_PWRON

A16

GPIO9/AC_SDIN2

E6

LAN_PWRON26

It will change next

GPIO16/KBCLK

V_ADJ

verison

D13

/geyserville

GPIO10/AC_SDIN3

B3

V_ADJ

36

GPIO17/PMDAT

B15

GPIO11/OSC25M/STP_PCI#

F5

HWSUS_CB#

HWSUS_CB#19

GPIO18/PMCLK

GPIO12/CPUSTP#

D4

CPUSTP#

CPUSTP#

4,29

963

NEED NOT to place		+3VS
close to 96X
LPC_AD3	RN97
	8	1
LPC_AD0	7	2
LPC_AD2	6	3
LPC_AD1	5	4
LPC_DRQ#	8P4R-4.7K
	R504	4.7K(R)
SERIRQ	R510	4.7K(R)
SENTEST	R532	0
GPIO pins
NEED NOT to place		+3VS
close to 96X

ATF_INT#	R511	4.7K
SMBDAT	R534	4.7K
SMBCLK	R537	4.7K
GPIO18	R150	4.7K
LCDID0	R538	10K
LCDID1	R517	10K
LCDID2	R518	10K
GMUXSEL	R165	4.7K(R)
DPERSLP	R535	4.7K
AC_SDIN0	R190	100K
AC_SDIN1	R522	100K
		+3V

LAN_PWRON	R524	100K
V_ADJ	R186	100K
961PME#	R151	4.7K
VGATE	R208	4.7K
HWSUS_CB#	R525	4.7k

		VID1		D30		ATF_INT#
2,36	VID1		C		A
				F01J2E

Sheet 14 of 42

963-2

(Misc Signals)

2 of 4

B.Schematic Diagrams

963-2 (Misc Signals) 2 of 4 (71-D40U0-D03) B - 15