Document History, REV ECN no, Aju, Pci

CY62146DV30

Document History Page

Document Title:CY62146DV30 MoBL® 4-Mbit (256K x 16) Static RAM

Document Number: 38-05339

REV.	ECN NO.	Issue Date	Orig. of	Description of Change
REV.	ECN NO.	Issue Date	Change	Description of Change

**	213251	See ECN	AJU	New Data Sheet

*A	316039	See ECN	PCI	Added 45-ns Speed Bin in AC, DC and Ordering Information tables
				Added Footnote #10 on page #4
				Added Pb-free package ordering information on page # 9
				Changed 44-lead TSOP-II package name on page 10 from Z44 to ZS44
				Standardized Icc values across ‘L’ and ‘LL’ bins

Document #: 38-05339 Rev. *A

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Cypress CY62146DV30 manual Document History, REV ECN no, Issue Date Orig. Description of Change, Aju, Pci

Contents

Cypress Semiconductor Corporation FeaturesLogic Block Diagram Functional Description1 Typ Max Product PortfolioTsop II Top View Vfbga Top View Operating Range Electrical Characteristics Over the Operating RangeMaximum Ratings Data Retention Waveform Data Retention Characteristics Over the Operating RangeThermal Resistance9 AC Test Loads and Waveforms10 Switching Characteristics Over the Operating Range Data OUT Previous Data Valid Switching WaveformsRead Cycle 1 Address Transition Controlled16 Address Data I/O Write Cycle No WE Controlled15, 19Write Cycle No CE Controlled15, 19 DATAI/O Data Write Cycle No WE Controlled, OE LOW20Write Cycle No BHE/BLE Controlled, OE LOW20 BV48A Inputs/Outputs Mode PowerOrdering Information BHE BLE Pin Tsop II ZS44 Package DiagramLead Vfbga 6 x 8 x 1 mm BV48A AJU Issue Date Orig. Description of ChangeDocument History REV ECN no

Cypress CY62146DV30 Document History, REV ECN no, Issue Date Orig. Description of Change, Aju

Models: CY62146DV30

Document History Page

REV.

ECN NO.

Issue Date

Orig. of

Description of Change

AJU

PCI