Write Cycle No WE Controlled, OE LOW20

CY62146DV30

Write Cycle No. 3 (WE Controlled, OE LOW)[20]

Document #: 38-05339 Rev. *A

Page 8 of 11

[+] Feedback

Image 8

Contents

Features Logic Block DiagramFunctional Description1 Cypress Semiconductor Corporation Product Portfolio Tsop II Top ViewVfbga Top View Typ Max Operating Range Electrical Characteristics Over the Operating RangeMaximum Ratings Data Retention Characteristics Over the Operating Range Thermal Resistance9AC Test Loads and Waveforms10 Data Retention Waveform Switching Characteristics Over the Operating Range Switching Waveforms Read Cycle 1 Address Transition Controlled16Address Data OUT Previous Data Valid Data I/O Write Cycle No WE Controlled15, 19Write Cycle No CE Controlled15, 19 DATAI/O Data Write Cycle No WE Controlled, OE LOW20Write Cycle No BHE/BLE Controlled, OE LOW20 Inputs/Outputs Mode Power Ordering InformationBHE BLE BV48A Pin Tsop II ZS44 Package DiagramLead Vfbga 6 x 8 x 1 mm BV48A Issue Date Orig. Description of Change Document HistoryREV ECN no AJU