CY62146DV30Document #: 38-05339 Rev. *A Page 2 of 11
Notes:
2. NC pins are not internally connected on the die.
3. DNU pins have to be left floating or tied to VSS to ensure proper application.
4. Pins H1, G2, and H6 in the BGA package are address expansion pins for 8 Mb, 16 Mb, and 32 Mb, respectively.
5. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ.), TA = 25°C.
Pin Configuration[2, 3, 4]
VFBGA (Top View) 44 TSOP II (Top View)
WE
A11
A10
A6
A0
A3CE
I/O
10
I/O
8
I/O
9
A4
A5
I/O
11
I/O
13
I/O
12
I/O
14
I/O
15
V
SS
A9
A8
OE
Vss
A7
I/O
0
BHE
NC
A17
A2
A1
BLE
V
CC
I/O
2
I/O
1
I/O
3
I/O
4
I/O
5I/O
6
I/O
7
A15
A14
A13
A
12
NC
NC NC
3
26
5
4
1
D
E
B
A
C
F
G
H
A16
DNU
Vcc
WE
1
2
3
4
5
6
7
8
9
10
11
14 31
32
36
35
34
33
37
40
39
38
12
13
41
44
43
42
16
15
29
30
VCC
A17
A16
A15
A14
A4
A3
OE
VSS
A5
I/O15
A2
CE
I/O2
I/O0
I/O1
BHE
A1
A0
18
17
20
19
I/O3
27
28
25
26
22
21
23
24
VSS
I/O6
I/O4
I/O5
I/O7
A6
A7
BLE
VCC
I/O14
I/O13
I/O12
I/O11
I/O10
I/O9
I/O8
A8
A9
A10
A11
A13 A12
NC
Product Portfolio
Product
VCC Range (V) Speed
(ns)
Power Dissipation
Operating ICC (mA)
Standby ISB2 (µA)f = 1MHz f = fmax
Min. Typ.[5] Max. Typ.[5] Max. Typ.[5] Max. Typ.[5] Max.
CY62146DV30L 2.20V 3.0 3.60 45 1.5 3 10 20 2 12
CY62146DV30LL 8
CY62146DV30L 2.20V 3.0 3.60 55 1.5 3 8 15 2 12
CY62146DV30LL 8
CY62146DV30L 2.20V 3.0 3.60 70 1.5 3 8 15 2 12
CY62146DV30LL 8
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