Contents
MoBL CY62148EV30
Features
Logic Block Diagram
Functional Description
MoBL CY62148EV30
Pin Configuration 1
Power Dissipation
Product Portfolio
Operating Range
Electrical Characteristics Over the Operating Range
Maximum Ratings
Ambient
AC Test Loads and Waveforms
Data Retention Characteristics Over the Operating Range
Thermal Resistance
Data Retention Waveform
Read Cycle
Switching Characteristics
45 Ind’l/Auto-A
Write Cycle
MoBL CY62148EV30
Switching Waveforms
Figure 2. Read Cycle No. 2 OE Controlled 17
+ Feedback
Truth Table
Switching Waveforms continued
Power
Figure 4. Write Cycle No. 2 CE Controlled 19
Ordering Information
Package Diagrams
Diagram
Ordering Code
MoBL CY62148EV30
Package Diagrams continued
Figure 7. 32-pin TSOP II
+ Feedback
MoBL CY62148EV30
Figure 8. 32-pin 450 MIL Molded SOIC
Package Diagrams continued
Page 10 of
Document Number
Document History Page
Document Title CY62148EV30 MoBL 4-Mbit 512K x 8 Static RAM
Revision
psoc.cypress.com/solutions
Sales, Solutions, and Legal Information
PSoC Solutions
MoBL CY62148EV30