MoBL® CY62148EV30
Maximum Ratings
Exceeding maximum ratings may impair the useful life of the device. These user guidelines are not tested.
Storage Temperature | ||
Ambient Temperature with |
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Power Applied | 55°C to +125°C | |
Supply Voltage to Ground |
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Potential | ||
DC Voltage Applied to Outputs |
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in | + 0.3V | |
| CC(max) |
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Electrical Characteristics (Over the Operating Range)
DC Input Voltage [5, 6] |
| + 0.3V | ||||
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| CC(max) |
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Output Current into Outputs (LOW) |
| 20 mA | ||||
Static Discharge Voltage |
| > 2001V | ||||
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Latch up Current | ..................................................... |
| > 200 mA | |||
Operating Range |
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Product |
| Range | Ambient | VCC | [7] | |
| Temperature |
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CY62148EV30 |
| 2.2V to 3.6V | ||||
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Parameter | Description |
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| Test Conditions | - 45 | - 55 | [1] | Unit | ||||
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| Min | Typ[4] | Max | Min | Typ[4] | Max | |||||
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VOH | Output HIGH |
| IOH = |
| 2.0 |
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| 2.0 |
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| V | |||
| Voltage |
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| IOH = | 2.4 |
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| 2.4 |
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VOL | Output LOW |
| IOL = 0.1 mA |
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| 0.4 |
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| 0.2 | V | |||
| Voltage |
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| IOL = 2.1 mA, VCC > 2.70V |
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| 0.4 | V | |||||
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VIH | Input HIGH |
| VCC = 2.2V to 2.7V |
| 1.8 |
| VCC + 0.3V | 1.8 |
| VCC + 0.3V | V | |||
| Voltage |
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| VCC= 2.7V to 3.6V |
| 2.2 |
| VCC + 0.3V | 2.2 |
| VCC + 0.3V | V | ||||
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VIL | Input LOW |
| VCC = 2.2V to 2.7V | For VFBGA and |
| 0.6 |
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| V | ||||
| Voltage |
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| TSOP II package |
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| For SOIC package |
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| 0.4 [8] | V | |
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| VCC = 2.7V to 3.6V | For VFBGA and |
| 0.8 |
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| V | ||||
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| TSOP II package |
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| For SOIC package |
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| 0.6 [8] |
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IIX | Input Leakage |
| GND < VI < VCC |
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| +1 | μA | |||||
| Current |
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IOZ | Output Leakage |
| GND < VO < VCC, Output Disabled |
| +1 |
| +1 | μA | ||||||
| Current |
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ICC | VCC Operating |
| f = fmax = 1/tRC | VCC = VCC(max), |
| 15 | 20 |
| 15 | 20 | mA | |||
| Supply Current |
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| IOUT = 0 mA, |
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| f = 1 MHz |
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| 2 | 2.5 |
| 2 | 2.5 |
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| CMOS levels |
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ISB1 | Automatic CE |
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| > VCC | – 0.2V, |
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| 1 | 7 |
| 1 | 7 | μA | |
CE |
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| Power Down |
| VIN > VCC | – 0.2V, VIN < 0.2V |
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| Current — CMOS |
| f = fmax | (Address and Data Only), |
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| Inputs |
| f = 0 (OE and WE), VCC = 3.60V |
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ISB2 [9] | Automatic CE |
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| > VCC | – 0.2V, |
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| 1 | 7 |
| 1 | 7 | μA | |
CE |
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| Power Down |
| VIN > VCC | – 0.2V or VIN < 0.2V, |
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| Current — CMOS |
| f = 0, VCC | = 3.60V |
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| Inputs |
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Notes
5.VIL(min) =
6.VIH(max) = VCC + 0.75V for pulse durations less than 20 ns.
7.Full device AC operation assumes a minimum of 100 μs ramp time from 0 to VCC(min) and 200 μs wait time after VCC stabilization.
8.Under DC conditions the device meets a VIL of 0.8V (for VCC range of 2.7V to 3.6V) and 0.6V (for VCC range of 2.2V to 2.7V). However, in dynamic conditions Input LOW voltage applied to the device must not be higher than 0.6V and 0.4V for the above ranges. This is applicable to SOIC package only. Please refer to AN13470 for details.
9.Only chip enable (CE) must be HIGH at CMOS level to meet the ISB2 / ICCDR spec. Other inputs can be left floating.
Document #: | Page 3 of 12 |
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