Cypress CY62167EV18 Ordering Information, Package Diagram

CY62167EV18 MoBL®

Document #: 38-05447 Rev. *G Page 10 of 13

Ordering Information

Speed

(ns) Ordering Code

Package

Diagram Package Type Operating

Range

55 CY62167EV18LL-55BAXI 001-13297 48-ball VFBGA (6 × 7 × 1 mm) (Pb-free) Industrial

CY62167EV18LL-55BVI 51-85150 48-ball VFBGA (6 × 8 × 1 mm)

CY62167EV18LL-55BVXI 48-ball VFBGA (6 × 8 × 1 mm) (Pb-free)

CY62167EV30LL-45BVI [5] 51-85150 48-ball VFBGA (6 × 8 × 1 mm)

Package Diagram

Figure 10. 48-Ball VFBGA (6 x 7 x 1 mm), 001-13297

NOTES:

1. ALL DIMENSION ARE IN MM [MAX/MIN]

2. JEDEC REFERENCE : MO-216

3. PACKAGE WEIGHT : 0.03g 001-13297-*A

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Contents

Main CY62167EV18 MoBL 16 Mbit (1M x 16) Static RAM Features Functional Description Logic Block Diagram CY62167EV18 MoBL Pin Configuration Figure 1. 48-Ball VFBGA (6 x 7 x 1mm) / (6 x 8 x 1mm) Top View Product Portfolio Product VCC Range (V) Speed (ns) Maximum Ratings Operating Range Electrical Characteristics Capacitance Thermal Resistance Data Retention Characteristics Switching Characteristics CY62167EV18 MoBL Switching Waveforms Figure 5 shows OE controlled read cycle waveforms.[19, 20] Figure 5. Read Cycle No. 2 CY62167EV18 MoBL Document #: 38-05447 Rev. *G Page 7 of 13 Figure 6 shows WE controlled write cycle waveforms.[17, 21, 22] Figure 6. Write Cycle No. 1 CY62167EV18 MoBL Document #: 38-05447 Rev. *G Page 8 of 13 t Figure 7 shows CE1 or CE2 controlled write cycle waveforms.[17, 21, 22] Figure 7. Write Cycle No. 2 Figure 8 shows WE controlled, OE LOW write cycle waveforms.[22] Figure 8. Write Cycle No. 3 Truth Table Ordering Information Package Diagram Figure 11. 48-Ball VFBGA (6 x 8 x 1 mm), 51-85150 Package Diagram 51-85150-*D Document History Page Sales, Solutions, and Legal Information Worldwide Sales and Design Support Products PSoC Solutions