ZZ Mode Timing20, DON’T Care | Cypress CY7C1215H specs

CY7C1215H

ZZMode Timing[20, 21]

t ZZ

t ZZI

ISUPPLY

I DDZZ

ALL INPUTS (except ZZ)

Outputs (Q)

High-Z

t ZZREC

t RZZI

DESELECT or READ Only

Notes:

20.Device must be deselected when entering ZZ mode. See Cycle Descriptions table for all possible signal conditions to deselect the device.

21.DQs are in High-Z when exiting ZZ sleep mode.

Document #: 38-05666 Rev. *B

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Contents

Logic Block Diagram FeaturesFunctional Description1 Cypress Semiconductor Corporation Selection Guide Pin Configuration Pin TqfpCY7C1215H 166 MHz 133 MHz Unit Pin Definitions Functional Overview Sleep ModeBurst Sequences First Second Third Fourth Address A1, A0 Interleaved Burst Address Table Mode = Floating or VDDNext Cycle Add. Used Adsp Adsc ADV Function Truth Table for Read/Write2BWE BW D BW C BW B BW a Maximum Ratings Electrical Characteristics Over the Operating Range7Operating Range Ambient Range Thermal Resistance9 Capacitance9AC Test Loads and Waveforms Switching Characteristics Over the Operating Range 10 Read Cycle Timing16 Switching Waveforms Write Cycle Timing16 CLZ Read/Write Cycle Timing16, 18 DON’T Care ZZ Mode Timing20 Ordering Information Package DiagramPin Tqfp 14 x 20 x 1.4 mm Document History Issue Date Orig. Description of ChangeREV ECN no