CY7C1266V18, CY7C1277V18
CY7C1268V18, CY7C1270V18
Document Number: 001-06347 Rev. *D Page 21 of 27
Capacitance[20]
Parameter Description Test Conditions Max Unit
CIN Input Capacitance TA = 25°C, f = 1 MHz,
VDD = 1.8V
VDDQ = 1.5V
5pF
CCLK Clock Input Capacitance 4 pF
COOutput Capacitance 5 pF
Thermal Resistance[20]
Parameter Description Test Conditions 165 FBGA
Package Unit
ΘJA Thermal Resistance
(Junction to Ambient) Test conditions follow standard test methods and
procedures for measuring thermal impedance, per
EIA/JESD51.
16.25 °C/W
ΘJC Thermal Resistance
(Junction to Case) 2.91 °C/W
AC Test Loads and Waveforms
Figure 4. AC Test Loads and Waveforms
1.25V
0.25V
R = 50Ω
5pF
INCLUDING
JIG AND
SCOPE
ALL INPUT PULSES
Device RL= 50Ω
Z0= 50Ω
VREF = 0.75V
VREF = 0.75V
[21]
0.75V
Under
Test
0.75V
Device
Under
Test
OUTPUT
0.75V
VREF
VREF
OUTPUT
ZQ
ZQ
(a)
Slew Rate = 2 V/ns
RQ =
250
Ω
(b)
RQ =
250
Ω
Notes
20.Tested initially and after any design or process change that may affect these parameters.
21.Unless otherwise noted, test conditions assume signal transition time of 2V/ns, timing reference levels of 0.75V, VREF = 0.75V, RQ = 250Ω, VDDQ = 1.5V, input
pulse levels of 0.25V to 1.25V, and output loading of the specified IOL/IOH and load capacitance shown in (a) of AC Test Loads and Waveforms.
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