Cypress CY7C1298H CY7C1298H

CY7C1298H

Document #: 38-05665 Rev. *B Page 7 of 16

Truth Table for Read/Write[2,3]

Function GW BWE BWABWB

Read H H X X

Read H L H H

Write byte A – (DQA and DQPA)H L L H

Write byte B – (DQB and DQPB)H L H L

Write all bytes H L L L

Write all bytes L X X X

Parameter Description Test Conditions Min. Max. Unit

IDDZZ Sleep mode standby current ZZ > VDD − 0.2V 40 mA

tZZS Device operation to ZZ ZZ > VDD − 0.2V 2tCYC ns

tZZREC ZZ recovery time ZZ < 0.2V 2tCYC ns

tZZI ZZ Active to Sleep current This parameter is sampled 2tCYC ns

tRZZI ZZ inactive to exit Sleep current This parameter is sampled 0 ns

[+] Feedback

Contents

Main 1-Mbit (64K x 18) Pipelined DCD Sync SRAM CY7C1298H Features Functional Description Selection Guide CY7C1298H Functional Block Diagram A E ADDRESS REGISTER CY7C1298H A Pin Descriptions Functional Overview Burst Sequences Sleep Mode Interleaved Burst Address Table (MODE = Floating or VDD) Linear Burst Address Table (MODE = GND) Truth Table CY7C1298H Truth Table for Read/Write ZZ Mode Electrical Characteristics CY7C1298H Maximum Ratings Operating Range Electrical Characteristics CY7C1298H Capacitance Thermal Characteristics AC Test Loads and Waveforms Switching Characteristics Switching Waveforms Read Timing [+] Feedback CY7C1298H Write Timing Read/Write Timing ZZ Mode Timing Ordering Information Package Diagram A Document History Page