PRELIMINARY CY7C1333H
Document #: 001-00209 Rev. ** Page 7 of 12

Maximum Ratings

(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature .................................–65°C to +150°C
Ambient Temperature with
Power Applied.............................................–55°C to +125°C
Supply Voltage on VDD Relative to GND...... –0.5V to +4.6V
DC Voltage Applied to Outputs
in Tri-State...........................................–0.5V to VDDQ + 0.5V
DC Input Voltage....................................–0.5V to VDD + 0.5V
Current into Outputs (LOW).........................................20 mA
Static Discharge Voltage.......................................... > 2001V
(per MIL-STD-883, Method 3015)
Latch-up Current.................................................... > 200 mA

Operating Range

Range Ambient
Temperature (TA)V
DD VDDQ
Com’l 0°C to +70°C 3.3V – 5%/+10% 3.3V – 5% to
VDD
Ind’l -40°C to +85°C

Electrical Characteristics Over the Operating Range [9,10]

Parameter Description Test Conditions Min. Max. Unit
VDD Power Supply Voltage 3.135 3.6 V
VDDQ I/O Supply Voltage for 3.3V I/O 3.135 VDD V
VOH Output HIGH Voltage for 3.3V I/O, IOH = –4.0 mA 2.4 V
VOL Output LOW Voltage for 3.3V I/O, IOL = 8.0 mA 0.4 V
VIH Input HIGH Voltage for 3.3V I/O 2.0 VDD + 0.3V V
VIL Input LOW Voltage[9] for 3.3V I/O –0.3 0.8 V
IXInput Load Current (except
ZZ and MODE) GND ≤ VI ≤ VDDQ –5 5µA
Input Current of MODE Input = VSS –30 µA
Input = VDD 5µA
Input Current of ZZ Input = VSS –5 µA
Input = VDD 30 µA
IOZ Output Leakage Current GND ≤ VI ≤ VDD, Output Disabled –5 5 µA
IDD VDD Operating Supply
Current VDD = Max., IOUT = 0 mA,
f = fMAX= 1/tCYC
7.5-ns cycle, 133 MHz 225 mA
10-ns cycle, 100 MHz 205 mA
ISB1 Automatic CE Power-down
Current—TTL Inputs VDD = Max, Device Deselected,
VIN ≥ VIH or VIN ≤ VIL, f = fMAX,
inputs switching
7.5-ns cycle, 133 MHz 90 mA
10-ns cycle, 100 MHz 80 mA
ISB2 Automatic CE Power-down
Current—CMOS Inputs VDD = Max, Device Deselected,
VIN ≥ VDD – 0.3V or VIN ≤ 0.3V,
f = 0, inputs static
All speeds 40 mA
ISB3 Automatic CE Power-down
Current—CMOS Inputs VDD = Max, Device Deselected,
VIN ≥ VDDQ – 0.3V or VIN ≤ 0.3V ,
f = fMAX, inputs switching
7.5-ns cycle, 133 MHz 75 mA
10-ns cycle, 100 MHz 65 mA
ISB4 Automatic CE Power-down
Current—TTL Inputs VDD = Max, Device Deselected,
VIN ≥ VDD – 0.3V or VIN ≤ 0.3V,
f = 0, inputs static
All speeds 45 mA
Thermal Resistance[11]
Parameters Description Test Conditions 100 TQFP
Package Unit
ΘJA Thermal Resistance
(Junction to Ambient) Test conditions follow standard test methods and
procedures for measuring thermal impedance,
per EIA/JESD51
30.32 °C/W
ΘJC Thermal Resistance
(Junction to Case) 6.85 °C/W
Notes:
9. Overshoot: VIH(AC) < VDD +1.5V (Pulse width less than tCYC/2), undershoot: VIL(AC)> –2V (Pulse width less than tCYC/2).
10.Power-up: Assumes a linear ramp from 0V to VDD (min.) within 200 ms. During this time VIH < VDD and VDDQ < VDD.
11.Tested initially and after any design or process changes that may affect these parameters.
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