Cypress CY7C1333H Truth Table for Read/Write

PRELIMINARY CY7C1333H

Document #: 001-00209 Rev. ** Page 6 of 12

Truth Table for Read/Write[2, 3]

Function WE BWABWBBWCBWD

Read HXXXX

Write No Bytes Written LHHHH

Write Byte A – (DQA) L LHHH

Write Byte B – (DQB)LHLHH

Write Byte C – (D QC)LHHLH

Write Byte D – (D QD) LHHHL

Write All Bytes L L L L L

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Contents

Main PRELIMINARY 2-Mbit (64K x 32) Flow-Through SRAM with NoBL Architecture CY7C1333H Features Functional Description Logic Block Diagram CY7C1333H PRELIMINARY CY7C1333H Pin Definitions Functional Overview Linear Burst Address Table (MODE = GND) Interleaved Burst Sequence ZZ Mode Electrical Characteristics Truth Table Truth Table for Read/Write PRELIMINARY CY7C1333H Maximum Ratings Operating Range Electrical Characteristics Over the Operating Range [9,10] Thermal Resistance Capacitance AC Test Loads and Waveforms Switching Characteristics Document #: 001-00209 Rev. ** Page 9 of 12 [+] Feedback Switching Waveforms Read/Write Waveforms [18, 19, 20] Switching Characteristics Parameter Description 133 MHz 100 MHz Unit Min. Max. Min. Max. Switching Waveforms (continued) Ordering Information Speed (MHz) Ordering Code Package Package Diagram