Manuals / Cypress / Computer Equipment / Computer Hardware

Cypress CY7C1556V18, CY7C1543V18, CY7C1545V18, CY7C1541V18 manual Ordering Information continued

Models: CY7C1543V18 CY7C1556V18 CY7C1541V18 CY7C1545V18

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Ordering Information (continued)

CY7C1541V18, CY7C1556V18

CY7C1543V18, CY7C1545V18

Ordering Information (continued)

Not all of the speed, package and temperature ranges are available. Please contact your local sales representative or visit www.cypress.com for actual products offered.

Speed	Ordering Code	Package	Package Type	Operating
(MHz)	Ordering Code	Diagram	Package Type	Range
300	CY7C1541V18-300BZC	51-85195	165-Ball Fine Pitch Ball Grid Array (15 x 17 x 1.4 mm)	Commercial

	CY7C1556V18-300BZC

	CY7C1543V18-300BZC

	CY7C1545V18-300BZC

	CY7C1541V18-300BZXC	51-85195	165-Ball Fine Pitch Ball Grid Array (15 x 17 x 1.4 mm) Pb-Free

	CY7C1556V18-300BZXC

	CY7C1543V18-300BZXC

	CY7C1545V18-300BZXC

	CY7C1541V18-300BZI	51-85195	165-Ball Fine Pitch Ball Grid Array (15 x 17 x 1.4 mm)	Industrial

	CY7C1556V18-300BZI

	CY7C1543V18-300BZI

	CY7C1545V18-300BZI

	CY7C1541V18-300BZXI	51-85195	165-Ball Fine Pitch Ball Grid Array (15 x 17 x 1.4 mm) Pb-Free

	CY7C1556V18-300BZXI

	CY7C1543V18-300BZXI

	CY7C1545V18-300BZXI

Document Number: 001-05389 Rev. *F

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Cypress manual Ordering Information continued, CY7C1541V18, CY7C1556V18 CY7C1543V18, CY7C1545V18

Contents

CY7C1541V18, CY7C1556V18 CY7C1543V18, CY7C1545V18 FeaturesConfigurations Functional DescriptionCY7C1541V18, CY7C1556V18 CY7C1543V18, CY7C1545V18 Logic Block Diagram CY7C1541V18Logic Block Diagram CY7C1556V18 + FeedbackCY7C1541V18, CY7C1556V18 CY7C1543V18, CY7C1545V18 Logic Block Diagram CY7C1543V18Logic Block Diagram CY7C1545V18 + FeedbackCY7C1541V18, CY7C1556V18 CY7C1543V18, CY7C1545V18 Pin Configuration165-Ball FBGA 15 x 17 x 1.4 mm Pinout 165-Ball FBGA 15 x 17 x 1.4 mm Pinout Pin Configuration continuedCY7C1541V18, CY7C1556V18 CY7C1543V18, CY7C1545V18 Pin Definitions CY7C1543V18, CY7C1545V18CY7C1541V18, CY7C1556V18 CY7C1541V18, CY7C1556V18 CY7C1543V18, CY7C1545V18Pin Definitions continued Read Operations CY7C1541V18, CY7C1556V18 CY7C1543V18, CY7C1545V18Functional Overview Write OperationsDepth Expansion Valid Data Indicator QVLDApplication Example Programmable ImpedanceCY7C1541V18, CY7C1556V18 CY7C1543V18, CY7C1545V18 Truth TableWrite Cycle Descriptions NWS0Write Cycle Descriptions CY7C1541V18, CY7C1556V18 CY7C1543V18, CY7C1545V18Write Cycle Descriptions Performing a TAP Reset Disabling the JTAG FeatureTest Access Port-Test Clock IEEE 1149.1 Serial Boundary Scan JTAGBYPASS SAMPLE ZSAMPLE/PRELOAD EXTESTPage 14 of TAP Controller State DiagramCY7C1541V18, CY7C1556V18 CY7C1543V18, CY7C1545V18 CY7C1541V18, CY7C1556V18 CY7C1543V18, CY7C1545V18 TAP Controller Block DiagramTAP Electrical Characteristics CY7C1541V18, CY7C1556V18 CY7C1543V18, CY7C1545V18 TAP AC Switching CharacteristicsTAP Timing and Test Conditions Instruction Codes Identification Register DefinitionsScan Register Sizes CY7C1541V18, CY7C1556V18 CY7C1543V18, CY7C1545V18Boundary Scan Order CY7C1541V18, CY7C1556V18 CY7C1543V18, CY7C1545V18DLL Constraints Power Up Sequence in QDR-II+ SRAMPower Up Sequence K K VDD/VDDQ DOFFMaximum Ratings Electrical CharacteristicsDC Electrical Characteristics Operating RangeCapacitance Electrical Characteristics continuedAC Electrical Characteristics DC Electrical CharacteristicsPackage Thermal ResistanceCY7C1541V18, CY7C1556V18 CY7C1543V18, CY7C1545V18 Parameter Switching CharacteristicsCY7C1541V18, CY7C1556V18 CY7C1543V18, CY7C1545V18 Q CQ CQ Switching WaveformsWPS A D QVLD CY7C1541V18, CY7C1556V18 CY7C1543V18, CY7C1545V18Ordering Information CY7C1541V18, CY7C1556V18 CY7C1543V18, CY7C1545V18Ordering Information continued CY7C1541V18, CY7C1556V18 CY7C1543V18, CY7C1545V18Figure 6. 165-ball FBGA 15 x 17 x 1.4 mm Package DiagramCY7C1541V18, CY7C1556V18 CY7C1543V18, CY7C1545V18 + FeedbackCY7C1541V18, CY7C1556V18 CY7C1543V18, CY7C1545V18 Document History PageISSUE Document Number