CY7C64013C
CY7C64113C
Document #: 38-08001 Rev. *B Page 5 of 51
LIST OF TABLES
Table 4-1. Pin Assignments ..................................................................................................................10
Table 4-2. I/O Register Summary .........................................................................................................10
Table 4-3. Instruction Set Summary ......................................................................................................12
Table 9-1. GPIO Port Output Control Truth Table and Interrupt Polarity ..............................................20
Table 12-1. HAPI Port Configuration .....................................................................................................25
Table 12-2. I2C Port Configuration ........................................................................................................25
Table 13-1. I2C Status and Control Register Bit Definitions ..................................................................26
Table 14-1. Port 2 Pin and HAPI Configuration Bit Definitions .............................................................27
Table 16-1. Interrupt Vector Assignments .............................................................................................31
Table 17-1. Control Bit Definition for Upstream Port .............................................................................34
Table 18-1. Memory Allocation for Endpoints ......................................................................................35
Table 19-1. USB Register Mode Encoding ...........................................................................................39
Table 19-2. Details of Modes for Differing Traffic Conditions (see Table 19-1 for the decode legend) ........... 41
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