Cypress CY7C68000A Ordering Information, Package Diagrams

CY7C68000A

Document #: 38-08052 Rev. *G Page 12 of 15

Ordering Information

Ordering Code Package Type

CY7C68000A-56LFXC 56 QFN

CY7C68000A-56BAXC 56 VFBGA

CY3683 MoBL-USB TX2 Development Board

Package Diagrams

The MoBL-USB TX2 is available in two packages:

■56-pin QFN

■56-pin VFBGA

Figure 6. 56-Pin Quad Flatpack No Lead Package 8 x 8 mm (Sawn Version) LS56B

51-85187 *C

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Contents

Main MoBL-USB TX2 USB 2.0 UTMI Transceiver MoBL-USB TX2 Features Logic Block Diagram Applications Functional Overview USB Signaling Speed Transceiver Clock Frequency Buses Operational Modes DPLUS/DMINUS Impedance Termination Pin Configurations 56-pin QFN Document #: 38-08052 Rev. *G Page 5 of 15 Figure 2. CY7C68000A 56-pin VFBGA Pin Assignment CY7C68000A Pin Descriptions Page CY7C68000A Absolute Maximum Ratings Operating Conditions DC Characteristics AC Electrical Characteristics Timing Diagram HS/FS Interface Timing - 60 MHz HS/FS Interface Timing - 30 MHz Ttssu Ttspd Ttspd Suspend Tri-state Output / IO XXXX Hi-Z Ordering Information Package Diagrams PCB Layout Recommendations Package Diagrams Quad Flat Package No Leads (QFN) Package Design Notes PCB Material PCB Material Document History Page Sales, Solutions, and Legal Information Worldwide Sales and Design Support Products PSoC Solutions