Ordering Information, Package Diagrams | Cypress CY7C68000A specification

CY7C68000A

Ordering Information

Ordering Code	Package Type
CY7C68000A-56LFXC	56 QFN

CY7C68000A-56BAXC	56 VFBGA

CY3683	MoBL-USB TX2 Development Board

The MoBL-USB TX2 is available in two packages:

■56-pin QFN

■56-pin VFBGA

51-85187 *C

Document #: 38-08052 Rev. *G

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Contents

MoBL-USBTX2 Features Logic Block DiagramVfbga Cypress Semiconductor Corporation 198 Champion Court Applications Functional Overview Operational Modes DPLUS/DMINUS Impedance TerminationOpMode10 Description Pin Configurations CY7C68000A CY7C68000A 56-pin Vfbga Pin Assignment Name Type Default Description1 Pin DescriptionsPin Descriptions By the Transmit State Machine Receive Error XtalinXtalout GND DC Characteristics Absolute Maximum RatingsOperating Conditions DPLUS/DMINUS/CLK AC Electrical Characteristics Timing Diagram HS/FS Interface Timing 60 MHz HS/FS Interface Timing 30 MHz Package Diagrams Ordering InformationOrdering Code Package Type PCB Layout Recommendations Vfbga 5 x 5 x 1.0 mm 0.50 Pitch, 0.30 Ball BZ56 Quad Flat Package No Leads QFN Package Design Notes Cross section of the Area Underneath the QFN Package Sales, Solutions, and Legal Information Worldwide Sales and Design Support Products PSoC SolutionsDocument History Orig. Submission Description of Change Date