Cypress CY7C68000A Quad Flat Package No Leads (QFN) Package Design Notes

CY7C68000A

Document #: 38-08052 Rev. *G Page 14 of 15

Quad Flat Package No Leads (QFN) Package Design Notes

Electrical contact of the part to the Printed Circuit Board (PCB)

is made by soldering the leads on the bottom surface of the

package to the PCB. Hence, special attention is required to the

heat transfer area below the package to provide a good thermal

bond to the circuit board. A Copper (Cu) fill is to be designed into

the PCB as a thermal pad under the package. Heat is transferred

from the MoBL-USB TX2 through the device’s metal paddle on

the package bottom. From here, heat is conducted to the PCB at

the thermal pad. It is then conducted from the thermal pad to the

PCB inner ground plane by an array of via. A via is a plated

through-hole in the PCB with a finished diameter of 13 mil. The

QFN’s metal die paddle must be soldered to the PCB’s thermal

pad. Solder mask is placed on the board top, over each via, to

resist solder flow into the via. The mask on the top side also

minimizes outgassing during the solder reflow process.

For further information on this package design, refer to the appli-

cation note “Surface Mount Assembly of AMKOR’s MicroLead-

Frame (MLF) Technology.” Download this application note from

AMKOR’s website, by following this link:

http://www.amkor.com/products/notes_papers/MLFApp

Note.pdf. The application note provides detailed information on

board mounting guidelines, soldering flow, and rework process.

Figure8 displays a cross-sectional area under the package. The

cross section is of only one via. The solder paste template needs

to be designed to enable at least 50 percent solder coverage.

The thickness of the solder paste template should be 5 mil. It is

recommended that ‘No Clean’, type 3 solder paste be used for

mounting the part. Nitrogen purge is recommended during

reflow.

Figure9 is a plot of the solder mask pattern image of the

assembly (darker areas indicate solder).

Figure 9. Plot of the Solder Mask (White Area)

Figure 8. Cross section of the Area Underneath the QFN Package

0.017” dia

Solder Mask

Cu Fill

PCB Material 0.013” dia

Via hole for thermally connecting the

QFN to the circuit board ground plane.

This figure only shows the top three layers of the

circuit board: Top Solder, PCB Dielectric, and

the Ground Plane

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