Cypress CY7C68000A specifications Pin Descriptions, Name Type Default Description1

					CY7C68000A
Pin Descriptions
Table 1.	Pin Descriptions
QFN	VFBGA	Name	Type	Default	Description[1]
4	H1	AVCC	Power	N/A	Analog VCC This signal provides power to the analog section of the chip.
8	H5	AVCC	Power	N/A	Analog VCC This signal provides power to the analog section of the chip.
7	H4	AGND	Power	N/A	Analog Ground Connect to ground with as short a path as possible.
11	H8	AGND	Power	N/A	Analog Ground Connect to ground with as short a path as possible.
9	H6	DPLUS	I/O/Z	Z	USB DPLUS Signal Connect to the USB DPLUS signal.
10	H7	DMINUS	I/O/Z	Z	USB DMINUS Signal Connect to the USB DMINUS signal.
49	G8	D0	I/O		Bidirectional Data Bus This bidirectional bus is used as the entire data
					bus in the 8-bit bidirectional mode or the least significant eight bits in the
48	G7	D1	I/O
					16-bit mode. Under the 8-bit unidirectional mode, these bits are used as
46	G5	D2	I/O
					inputs for data, selected by the RxValid signal.
44	G3	D3	I/O
43	G2	D4	I/O
41	F8	D5	I/O
39	F6	D6	I/O
38	F5	D7	I/O
37	F4	D8	I/O		Bidirectional Data Bus This bidirectional bus is used as the upper eight
					bits of the data bus when in the 16-bit mode, and not used when in the
36	F3	D9	I/O
					8-bit bidirectional mode. Under the 8-bit unidirectional mode these bits
34	F1	D10	I/O		are used as outputs for data, selected by the TxValid signal.
33	G4	D11	I/O
31	E1	D12	I/O
29	D8	D13	I/O
27	G1	D14	I/O
26	E2	D15	I/O
50	A1	CLK	Output		Clock This output is used for clocking the receive and transmit parallel
					data on the D[15:0] bus.
3	B2	Reset	Input	N/A	Active HIGH Reset Resets the entire chip. This pin can be tied to VCC
					through a 0.1-μF capacitor and to GND through a 100 K resistor for a
					10-ms RC time constant.
12	B3	XcvrSelect	Input	N/A	Transceiver Select This signal selects between the Full Speed (FS) and
					the High Speed (HS) transceivers:
					0: HS transceiver enabled
					1: FS transceiver enabled
13	B4	TermSelect	Input	N/A	Termination Select This signal selects between the Full Speed (FS) and
					the High Speed (HS) terminations:
					0: HS termination
					1: FS termination
2	B1	Suspend	Input	N/A	Suspend Places the CY7C68000A in a mode that draws minimal power
					from supplies. Shuts down all blocks not necessary for Suspend/Resume
					operations. While suspended, TermSelect must always be in FS mode
					to ensure that the 1.5 Kohm pull up on DPLUS remains powered.
					0: CY7C68000A circuitry drawing suspend current
					1: CY7C68000A circuitry drawing normal current

Note

1.Unused inputs should not be left floating. Tie either HIGH or LOW as appropriate. Outputs that are three-statable should only be pulled up or down to ensure signals at power-up and in standby.

Document #: 38-08052 Rev. *G Page 6 of 15

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