CY8C24123
CY8C24223, CY8C24423
Document Number: 38-12011 Rev. *G Page 32 of 43
AC Digital Block Specifications
The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and -40°C ≤ TA ≤ 85°C, or 3.0V to 3.6V and -40°C ≤ TA ≤ 85°C, respectively. Typical parameters apply to 5V and 3.3V at 25°C and
are for design guidance only or unless otherwise specified.
Table 29. AC Digital Block Specifications
Function Description Min Typ Max Units Notes
Timer Capture Pulse Width 50a
a. 50 ns minimum input pulse width is based on the input synchronizers running at 24 MHz (42 ns nominal period).
– – ns
Maximum Frequency, No Capture – – 49.2 MHz 4.75V < Vdd < 5.25V
Maximum Frequency, With Capture – – 24.6 MHz
Counter Enable Pulse Width 50a– – ns
Maximum Frequency, No Enable Input – – 49.2 MHz 4.75V < Vdd < 5.25V
Maximum Frequency, Enable Input – – 24.6 MHz
Dead Band Kill Pulse Width:
Asynchronous Restart Mode 20 – – ns
Synchronous Restart Mode 50a– – ns
Disable Mode 50a– – ns
Maximum Frequency – – 49.2 MHz 4.75V < Vdd < 5.25V
CRCPRS
(PRS Mode) Maximum Input Clock Frequency – – 49.2 MHz 4.75V < Vdd < 5.25V
CRCPRS
(CRC Mode) Maximum Input Clock Frequency – – 24.6 MHz
SPIM Maximum Input Clock Frequency – – 8.2 MHz
SPIS Maximum Input Clock Frequency – – 4.1 ns
Width of SS_ Negated Between Transmissions 50a– – ns
Transmitt er Maximum Input Clock Frequency – – 16.4 MHz
Receiver Maximum Input Clock Frequency –16 49.2 MHz 4.75V < Vdd < 5.25V
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