CY8C24094, CY8C24794

 

 

 

 

 

 

 

 

 

 

 

CY8C24894, CY8C24994

 

 

 

 

 

 

 

 

 

 

 

 

 

Table 8-6. 100-Ball Part Pinout (VFBGA) (continued)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C8

I/O

I,M

P2[0]

Direct switched capacitor block input.

H8

I/O

M

P3[2]

 

 

 

C9

I/O

M

P4[2]

 

 

 

H9

I/O

M

P5[4]

 

 

 

C10

 

 

NC

No connection.

H10

I/O

 

P7[3]

 

 

 

D1

 

 

NC

No connection.

J1

Power

 

Vss

Ground connection.

 

D2

I/O

M

P3[7]

 

 

 

J2

Power

Vss

Ground connection.

 

 

D3

I/O

M

P4[5]

 

 

 

J3

USB

 

D+

 

 

 

D4

I/O

M

P2[5]

 

 

 

J4

USB

 

D-

 

 

 

D5

I/O

I/O,

P0[3]

Analog column mux input and column output.

J5

Power

Vdd

Supply voltage.

 

 

 

 

M

 

 

 

 

 

 

 

 

 

 

 

D6

I/O

I,M

P0[4]

Analog column mux input.

J6

I/O

 

P7[7]

 

 

 

D7

I/O

M

P2[6]

External Voltage Reference (VREF) input.

J7

I/O

 

P7[0]

 

 

 

D8

I/O

M

P4[6]

 

 

 

J8

I/O

M

P5[2]

 

 

 

D9

I/O

M

P4[0]

 

 

 

J9

Power

 

Vss

Ground connection.

 

D10

 

 

CCLK

OCD CPU clock output.

J10

Power

Vss

Ground connection.

 

E1

 

 

NC

No connection.

K1

Power

Vss

Ground connection.

 

 

E2

 

 

NC

No connection.

K2

Power

Vss

Ground connection.

 

 

E3

I/O

M

P4[3]

 

 

 

K3

 

 

NC

No connection.

 

 

E4

I/O

I,M

P2[3]

Direct switched capacitor block input.

K4

 

 

NC

No connection.

 

 

E5

Power

 

Vss

Ground connection.

K5

Power

Vdd

Supply voltage.

 

E6

Power

Vss

Ground connection.

K6

I/O

 

P7[6]

 

 

 

E7

I/O

M

P2[4]

External Analog Ground (AGND) input.

K7

I/O

 

P7[5]

 

 

 

E8

I/O

M

P4[4]

 

 

 

K8

I/O

 

P7[4]

 

 

 

E9

I/O

M

P3[6]

 

 

 

K9

Power

 

Vss

Ground connection.

 

E10

 

 

HCLK

OCD high-speed clock output.

K10

Power

Vss

Ground connection.

 

LEGENDA = Analog, I = Input, O = Output, M = Analog Mux Input, NC = No Connection, OCD = On-Chip Debugger.

Figure 8-6. CY8C24094 OCD (Not for Production)

 

1

2

3

4

5

6

7

8

9

10

A

Vss

Vss

NC

NC

NC

Vdd

NC

NC

Vss

Vss

B

Vss

Vss

P2[1]

P0[1]

P0[7]

Vdd

P0[2]

P2[2]

Vss

Vss

C

NC

P4[1]

P4[7]

P2[7]

P0[5]

P0[6]

P0[0]

P2[0]

P4[2]

NC

D

NC

P3[7]

P4[5]

P2[5]

P0[3]

P0[4]

P2[6]

P4[6]

P4[0]

CClk

E

NC

NC

P4[3]

P2[3]

Vss

Vss

P2[4]

P4[4]

P3[6]

HClk

F

ocde

P5[7]

P3[5]

P5[1]

Vss

Vss

P5[0]

P3[0]

XRES

P7[1]

G

ocdo

P5[5]

P3[3]

P1[7]

P1[1]

P1[0]

P1[6]

P3[4]

P5[6]

P7[2]

H

NC

P5[3]

P3[1]

P1[5]

P1[3]

P1[2]

P1[4]

P3[2]

P5[4]

P7[3]

J

Vss

Vss

D +

D -

Vdd

P7[7]

P7[0]

P5[2]

Vss

Vss

K

Vss

Vss

NC

NC

Vdd

P7[6]

P7[5]

P7[4]

Vss

Vss

BGA (Top View)

Document Number: 38-12018 Rev. *M

Page 14 of 47

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Cypress CY8C24894, CY8C24994, CY8C24094 manual Vss Ground connection D10

CY8C24094, CY8C24894, CY8C24994 specifications

The Cypress CY8C24994, CY8C24894, and CY8C24094 are part of the PSoC (Cypress Semiconductor's Programmable System-on-Chip) family, designed to integrate numerous functions onto a single chip for efficient performance and flexibility in various applications.

One of the key features of these devices is their combination of analog and digital components, allowing designers to create a customized system without the need for extensive external circuitry. Each of these chips incorporates an Arm Cortex-M3 processor core, which provides a powerful 32-bit architecture, enabling efficient execution of 32-bit operations while maintaining low power consumption.

The CY8C24994 is the most advanced in this series, supporting up to 128 GPIO (General Purpose Input/Output) pins, which enhances connectivity options. It features multiple programmable analog blocks, including op-amps, comparators, and DACs (Digital-to-Analog Converters), making it suitable for a variety of sensor interfacing and signal processing applications. Additionally, it supports USB communication, providing further versatility for applications requiring data exchange with a host device.

The CY8C24894 presents a slightly more cost-effective solution with slightly fewer GPIO pins and integrated features. It maintains many of the same core attributes as its counterpart, delivering excellent analog performance and several programmable digital blocks. It is suitable for applications requiring moderate computational capabilities along with flexibility in terms of peripherals and interfaces.

The CY8C24094, while positioned as a more basic option within this lineup, still provides essential functionalities for simpler tasks. With fewer pins and capabilities, it is ideal for applications where size and cost are more critical than extensive processing power.

All three devices utilize Cypress's proprietary CapSense technology, enabling touch-sensing capabilities without the need for mechanical buttons. This feature not only enhances user interaction but also contributes to the overall design's robustness and longevity.

In summary, the CY8C24994, CY8C24894, and CY8C24094 PSoC chips offer ample design flexibility with integrated analog and digital functionality, making them an excellent choice for developers aiming to create innovative embedded solutions across a wide range of applications, from consumer electronics to industrial control systems.