CY8C24094, CY8C24794

CY8C24894, CY8C24994

10.0.6 AC I2C Specifications

The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and -40°C TA 85°C, or 3.0V to 3.6V and -40°C TA 85°C, respectively. Typical parameters apply to 5V and 3.3V at 25°C and are for design guidance only.

Table 10-27. AC Characteristics of the I2C SDA and SCL Pins for Vdd

Symbol

 

Description

Standard Mode

 

Fast Mode

 

Units

 

Notes

 

Min

Max

 

Min

Max

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FSCLI2C

 

SCL Clock Frequency

0

100

0

400

 

kHz

 

 

 

THDSTAI2

 

Hold Time (repeated) START Condition. After

4.0

0.6

 

μs

 

 

 

C

 

this period, the first clock pulse is generated.

 

 

 

 

 

 

 

 

 

 

TLOWI2C

 

LOW Period of the SCL Clock

4.7

1.3

 

μs

 

 

 

THIGHI2C

 

HIGH Period of the SCL Clock

4.0

0.6

 

μs

 

 

 

TSUSTAI2

 

Set-up Time for a Repeated START Condition

4.7

0.6

 

μs

 

 

 

C

 

 

 

 

 

 

 

 

 

 

 

 

 

 

THDDATI2

 

Data Hold Time

0

0

 

μs

 

 

 

C

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TSUDATI2

 

Data Set-up Time

250

100[14]

 

ns

 

 

 

C

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TSUSTOI2

 

Set-up Time for STOP Condition

4.0

0.6

 

μs

 

 

 

C

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TBUFI2C

 

Bus Free Time Between a STOP and START

4.7

1.3

 

μs

 

 

 

 

 

 

Condition

 

 

 

 

 

 

 

 

 

 

TSPI2C

 

Pulse Width of spikes are suppressed by the

0

50

 

ns

 

 

 

 

 

 

input filter.

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 10-6. Definition for Timing for Fast/Standard Mode on the I2C Bus

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SDA

TLOWI2C

 

 

 

TSUDATI2C

 

 

 

 

SCL

 

 

 

S

THDSTAI2C THDDATI2C

THIGHI2C

TSUSTAI2C

THDSTAI2C

Sr

TSPI2C

TSUSTOI2C

TBUFI2C

P S

Note

14.A Fast-Mode I2C-bus device can be used in a Standard-Mode I2C-bus system, but the requirement tSU;DAT Š 250 ns must then be met. This automatically is the case if the device does not stretch the LOW period of the SCL signal. If such device does stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line trmax + tSU;DAT = 1000 + 250 = 1250 ns (according to the Standard-Mode I2C-bus specification) before the SCL line is released.

Document Number: 38-12018 Rev. *M

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Cypress CY8C24094, CY8C24994, CY8C24894 AC I2C Specifications, Definition for Timing for Fast/Standard Mode on the I2C Bus

CY8C24094, CY8C24894, CY8C24994 specifications

The Cypress CY8C24994, CY8C24894, and CY8C24094 are part of the PSoC (Cypress Semiconductor's Programmable System-on-Chip) family, designed to integrate numerous functions onto a single chip for efficient performance and flexibility in various applications.

One of the key features of these devices is their combination of analog and digital components, allowing designers to create a customized system without the need for extensive external circuitry. Each of these chips incorporates an Arm Cortex-M3 processor core, which provides a powerful 32-bit architecture, enabling efficient execution of 32-bit operations while maintaining low power consumption.

The CY8C24994 is the most advanced in this series, supporting up to 128 GPIO (General Purpose Input/Output) pins, which enhances connectivity options. It features multiple programmable analog blocks, including op-amps, comparators, and DACs (Digital-to-Analog Converters), making it suitable for a variety of sensor interfacing and signal processing applications. Additionally, it supports USB communication, providing further versatility for applications requiring data exchange with a host device.

The CY8C24894 presents a slightly more cost-effective solution with slightly fewer GPIO pins and integrated features. It maintains many of the same core attributes as its counterpart, delivering excellent analog performance and several programmable digital blocks. It is suitable for applications requiring moderate computational capabilities along with flexibility in terms of peripherals and interfaces.

The CY8C24094, while positioned as a more basic option within this lineup, still provides essential functionalities for simpler tasks. With fewer pins and capabilities, it is ideal for applications where size and cost are more critical than extensive processing power.

All three devices utilize Cypress's proprietary CapSense technology, enabling touch-sensing capabilities without the need for mechanical buttons. This feature not only enhances user interaction but also contributes to the overall design's robustness and longevity.

In summary, the CY8C24994, CY8C24894, and CY8C24094 PSoC chips offer ample design flexibility with integrated analog and digital functionality, making them an excellent choice for developers aiming to create innovative embedded solutions across a wide range of applications, from consumer electronics to industrial control systems.