dCS 904 User Manual | Manual for Software Version 1.5x and 1.36 |
dCS Ltd | June 2000 |
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Check Master Clock has changed frequency. If it has not go back to step 5.
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The system is now set up with the Master Clock configured for 96k operation and the ADCs and DACs locked in PCM mode to 96k.
Example: Switching to P3DChange the Master Clock frequency to 44.1k prior to changing the ADC and DAC operating mode to DSD. Change the DAC operating mode prior to the ADC. When changing the Master Clock frequency the system should be allowed to settle to the new frequency before any further
6)Command Master Clock to change frequency. Allow the system time to settle after this command with no
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7)Check Master Clock has changed frequency. If it has not go back to step 6.
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8)Command DACs 6, 7, 8 and 9 to change mode, the units may take up to 15 seconds to complete this command (if the previous mode had been PCM the FPGAs need to be
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9)Command ADCs 2, 3, 4 and 5 to change mode, the units may take up to 15 seconds to complete this command (if the previous mode had been DSD the FPGAs need to be
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Manual part no: DOC135904 iss 2B2 | Page 58 | 135904ma2b2.pdf file available from website |
Contact dCS on + 44 1799 531 999 | email to: more@dcsltd.co.uk |
(inside the UK replace + 44 with 0) | web site: www.dcsltd.co.uk |