BIOS
47h | Initialize EISA slot |
48h | Reserved |
49h | Calculate total memory by testing the last double last word of each |
64K page; Program writes allocation for AMD K5 CPU | |
4Ah | Reserved |
4Bh | Reserved |
4Ch | Reserved |
4Dh | Reserved |
| Program MTRR of M1 CPU; initialize L2 cache for P6 class CPU & |
4Eh | program cacheable range; Initialize the APIC for P6 class CPU; On |
MP platform, adjust the cacheable range to smaller one in case the | |
| cacheable ranges between each CPU are not identical |
4Fh | Reserved |
50h | Initialize USB |
51h | Reserved |
52h | Test all memory (clear all extended memory to 0) |
53h | Reserved |
54h | Reserved |
55h | Display number of processors |
56h | Reserved |
57h | Display PnP logo; Early ISA PnP initialization and assign CSN to |
every ISA PnP device | |
58h | Reserved |
59h | Initialize the combined Trend |
5Ah | Reserved |
5Bh | Show message for entering AWDFLASH.EXE from FDD (optional |
feature) | |
5Ch | Reserved |
5Dh | Initialize Init_Onboard_Super_IO switch; Initialize Init_Onboard_ |
AUDIO switch | |
5Eh | Reserved |
5Fh | Reserved |
60h | Okay to enter Setup utility |
61h | Reserved |
62h | Reserved |
63h | Reserved |
64h | Reserved |
65h | Initialize PS/2 mouse |
66h | Reserved |
67h | Prepare memory size information for function call: INT 15h ax=E820h |
68h | Reserved |
69h | Turn on L2 cache |
6Ah | Reserved |
6Bh | Program chipset registers according to items described in Setup & |
$XWR&RQ¿JXU WLRQW OH | |
6Ch | Reserved |
6Dh | Assign resources to all ISA PnP devices; Auto assign ports to onboard |
COM ports if the corresponding item in Setup is set to “AUTO” | |
6Eh | Reserved |
6Fh | ,QLWL OL]HÀRSS\FRQWUROOHU 6HWXSÀRSS\UHO WHG¿HOGVLQ K UGZ UH |
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