Epson RX-8801SA/JE (1), (2), (3), (5), (6), (7), (8), (9), Page, TE bit, TF bit, When a, TIE bit, ETM26E-03, /INT output, When /INT = low, the, If the TIE bit = "1" when a

RX − 8801 SA / JE

8.3. Fixed-cycle Timer Interrupt Function

The fixed-cycle timer interrupt generation function generates an interrupt event periodically at any fixed cycle set between 244.14 μs and 4095 minutes.

When an interrupt event is generated, the /INT pin goes to low level and "1" is set to the TF bit to report that an event has occurred. (However, when a fixed-cycle timer interrupt event has been generated low-level output from the /INT pin occurs only when the value of the control register's TIE bit is "1". Up to 7.8 ms after the interrupt occurs, the /INT status is automatically cleared (/INT status changes from low-level to Hi-Z).

	∗ Example of
	/INT operation
						7.8ms
						(Max.)
			TIE = " 1 "		period		TIE = " 1 " → " 0 "
			TE = " 0 " → " 1 "
8.3.1. Diagram of fixed-cycle timer interrupt function
	Fixed-cycle timer starts							Fixed-cycle timer stops
									" 1 "
	TE bit	(1)
				Operation of fixed-cycle timer					(7)
										" 0 "
" 1 "							(9)

TIE bit		(5)
/INT output			(6)
			tRTN
TF bit		(3)	(4)
		period	period
Event occurs	(1)	• • • 001 h → 000 h	(2)

							" 1 "
							" 0 "
					(7)		Hi - z
						∗ Even when the TE bit is	" L "
	tRTN		tRTN	tRTN		cleared to zero, /INT
(8)						remains low during the
						tRTN time.
		∗ Even when the TF					" 1 "
		bit is cleared to zero,
		the /INT status does					" 0 "
		not change.

periodperiod

(7)

∗When the TE bit value changes from "0" to "1" the fixed-cycle timer function starts.

The counter always starts counting down from the preset value when the TE value changes from "0" to "1".

RTC internal operation

Write operation

(1)When a "1" is written to the TE bit, the fixed-cycle timer countdown starts from the preset value.

(2)A fixed-cycle timer interrupt event starts a countdown based on the countdown period (source clock). When the count value changes from 001h to 000h, an interrupt event occurs.

∗After the interrupt event that occurs when the count value changes from 001h to 000h, the counter automatically reloads the preset value and again starts to count down. (Repeated operation)

(3)When a fixed-cycle timer interrupt event occurs, "1" is written to the TF bit.

(4)When the TF bit = "1" its value is retained until it is cleared to zero.

(5)If the TIE bit = "1" when a fixed-cycle timer interrupt occurs, /INT pin output goes low.

∗If the TIE bit = "0" when a fixed-cycle timer interrupt occurs, /INT pin output remains Hi-Z.

(6)Output from the /INT pin remains low during the tRTN period following each event, after which it is automatically cleared to Hi-Z status.

∗/INT is again set low when the next interrupt event occurs.

(7)When a "0" is written to the TE bit, the fixed-cycle timer function is stopped and the /INT pin is set to Hi-Z status.

∗When /INT = low, the fixed-cycle timer function is stopped. The tRTN period is the maximum amount of time before the /INT pin status changes from low to Hi-Z.

(8)As long as /INT = low, the /INT pin status does not change when the TF bit value changes from "1" to "0".

(9)When /INT = low, the /INT pin status changes from low to Hi-Z as soon as the TIE bit value changes from "1" to "0".

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