5.2 Logical Interface
5.2.3.5 DMA Setup - Device to Host or Host to Device (Bidirectional)
The DMA Setup - Device to Host or Host to Device FIS has the following layout:
3 | 3 |
| 2 | 2 | 2 | 2 |
| 2 | 2 | 2 | 2 |
| 2 | 2 | 1 | 1 |
| 1 | 1 |
| 1 | 1 | 1 | 1 | 1 | 1 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
1 | 0 |
| 9 | 8 | 7 | 6 |
| 5 | 4 | 3 | 2 |
| 1 | 0 | 9 | 8 |
| 7 | 6 |
| 5 | 4 | 3 | 2 | 1 | 0 |
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0 |
| Reserved (0) |
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| Reserved (0) |
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| A | I | D | Reserved (0) |
| FIS Type (41h) |
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1 |
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| 0 |
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| TAG |
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2 |
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3
Reserved (0)
4
DMA Buffer Offset
5
DMA Transfer Count
6
Reserved (0)
Figure 5.7 DMA Setup - Device to Host or Host to Device FIS layout
The DMA Setup - Device to Host or Host to Device FIS communicates the start of a
A - Auto Active bit. If this bit is cleared ("0" is set for the bit), it indicates that a DMA Active FIS transfer is required before a Data FIS transfer.
D - Direction bit. If this bit is set ("1" is set for the bit), it indicates that the data transfer direction is from the device to the host system.