IBM 90, 6.4 8-Bit Timer/Event Counters 5 and 6 Operations

90
CHAPTER 6 8-BIT TIMER/EVENT COUNTERS 5 AND 6
6.4 8-Bit Timer/Event Counters 5 and 6 Operations
6.4.1 Interval timer operations
By setting the 8-bit timer mode control registers 5 and 6 (TMC5 and TMC6) as shown in Figure 6-8, it can be
operated as an interval timer. The 8-bit timer/event counters 5 and 6 operate as interval timers which generate interrupt
requests repeatedly at intervals of the count value preset to 8-bit compare registers 50 and 60 (CR50 and CR60).
When the count values of the 8-bit timer registers 5 and 6 (TM5 and TM6) match the values set to CR50 and CR60,
counting continues with the TM5 and TM6 values cleared to 0 and the interrupt request signals (INTTM5 and INTTM6)
are generated.
Count clock of TM5 can be selected with the timer clock select register 5 (TCL5). Count clock of TM6 can be
selected with the timer clock select register 6 (TCL6).
Figure 6-8. 8-Bit Timer Mode Control Register Settings for Interval Timer Operation
Remarks 1. 0/1 : Setting 0 or 1 allows another function to be used simultaneously with the interval timer.
See 6.3 (3), (4) for details.
2. n = 5, 6
1
TCEn
0
TMCn6
0 0 0/1
LVSn LVRn TMCn1 TOEn
TMCn 0/1 0/1 0/1
Clear and start on match of TMn and CRn0
TMn operation enable