IBM 40, 3.3 Instruction Address Addressing

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CHAPTER 3 CPU ARCHITECTURE
15 0
PC
+
15 0
876
S
15 0
PC
α
jdisp8
When S = 0, all bits of α are 0.
When S = 1, all bits of α are 1.
PC indicates the start address
of the instruction
after the BR instruction.
...
3.3 Instruction Address Addressing
An instruction address is determined by program counter (PC) contents. The contents of PC are normally
incremented (+1 for each byte) automatically according to the number of bytes of an instruction to be fetched each
time another instruction is executed. When a branch instruction is executed, the branch destination information is
set to the PC and branched by the following addressing. (For details of instructions, refer to 78K/0 USER'S MANUAL:
Instruction (IEU-1372).
3.3.1 Relative addressing
[Function]
The value obtained by adding 8-bit immediate data (displacement value: jdisp8) of an instruction code to the
start address of the following instruction is transferred to the program counter (PC) and branched. The
displacement value is treated as signed two's complement data (–128 to +127) and bit 7 becomes a sign bit.
In the relative addressing modes, execution branches in a relative range of –128 to +127 from the first address
of the next instruction.
This function is carried out when the BR $addr16 instruction or a conditional branch instruction is executed.
[Illustration]