IBM - page 12

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CONTENTS
CHAPTER 1 OUTLINE..................................................................................................................... 1
1.1 Features ............................................................................................................................. 1
1.2 Applications ...................................................................................................................... 2
1.3 Ordering Information ........................................................................................................ 2
1.4 Quality Grade .................................................................................................................... 3
1.5 Pin Configuration (Top View)........................................................................................... 4
1.6 78K/0 Series Development ............................................................................................... 9
1.7 Block Diagram................................................................................................................... 11
1.8 Outline of Function ........................................................................................................... 12
1.9 Differences between the µ PD78081, 78082 and 78P083, the µ PD78081(A), 78082(A)
and 78P083(A), and the µ PD78081(A2) ........................................................................... 13
CHAPTER 2 PIN FUNCTION ...........................................................................................................15
2.1 Pin Function List ............................................................................................................... 15
2.1.1 Normal operating mode pins ............................................................................................... 15
2.1.2 PROM programming mode pins (
µ PD78P083 only)............................................................ 16
2.2 Description of Pin Functions ........................................................................................... 17
2.2.1 P00 to P03 (Port 0).............................................................................................................. 17
2.2.2 P10 to P17 (Port 1).............................................................................................................. 17
2.2.3 P30 to P37 (Port 3).............................................................................................................. 18
2.2.4 P50 to P57 (Port 5).............................................................................................................. 18
2.2.5 P70 to P72 (Port 7).............................................................................................................. 19
2.2.6 P100 to P101 (Port 10)........................................................................................................ 19
2.2.7 AVREF .................................................................................................................................. 20
2.2.8 AVDD .................................................................................................................................... 20
2.2.9 AVSS .................................................................................................................................... 20
2.2.10 RESET................................................................................................................................. 20
2.2.11 X1 and X2............................................................................................................................ 20
2.2.12 VDD ...................................................................................................................................... 20
2.2.13 VSS ...................................................................................................................................... 20
2.2.14 VPP (
µ PD78P083 only)......................................................................................................... 20
2.2.15 IC (Mask ROM version only)................................................................................................21
2.2.16 NC (44-pin plastic QFP versions only)................................................................................. 21
2.3 Pin Input/Output Circuits and Recommended Connection of Unused Pins ............... 22
CHAPTER 3 CPU ARCHITECTURE................................................................................................ 25
3.1 Memory Spaces................................................................................................................. 25
3.1.1 Internal program memory space.......................................................................................... 28
3.1.2 Internal data memory space ................................................................................................ 29
3.1.3 Special Function Register (SFR) area................................................................................. 29
3.1.4 Data memory addressing .................................................................................................... 29
3.2 Processor Registers ......................................................................................................... 33
3.2.1 Control registers .................................................................................................................. 33
3.2.2 General registers ................................................................................................................. 36