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A portion of the each VCO output is applied to the PLL IC (IC1, pin 6) via the buffer amplifi ers (Q4, Q5) and the tunable BPF (D30, D31, L40, C170−C174).
5-3-2 PLL CIRCUIT (MAIN UNIT)
The PLL circuit provides stable oscillation of the transmit frequency and receive 1st LO frequency. The PLL output frequency is controlled by the divided ratio
The
the reference frequency signal from the reference frequency oscillator (X1), at the phase detector.
The phase difference is output from pin 4 as a pulse type signal after being passed through the internal charge pump. The output signal is converted into the DC voltage (lock voltage) by passing through the loop filter (R7, R9, R12, C17, C18, C20). The lock voltage is applied to the variable capacitors (D1 and D2 of RX VCO1, D7 and D8 of RX VCO2, D11 and D12 of TX VCO) and locked to keep the VCO frequency constant.
If the oscillated signal drifts, its phase changes from that of the reference frequency, causing a lock voltage change to compensate for the drift in the VCO oscillating frequency.
• PLL CIRCUIT |
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RX VCO1 |
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| D14 | ||
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| Buffer | |
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| to transmitter circuit | |
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| Q6 | |
Q1, |
| TX VCO |
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| D15 | |||
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| Buffer |
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| to 1st mixer circuit | |
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| Q4 |
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RX VCO2 | Q3, |
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| Buffer |
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Q2, |
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| Q5 |
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| PLL IC (IC1) |
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Loop | 4 | Charge | Programmable | Prescaler | 6 |
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filter |
| pump | divider | BPF |
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| SCK |
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| Phase |
| Divide |
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| Shift register | 15 |
| SSO PLL control signals from the CPU (IC18) | |||||||||
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| ratio |
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| detector |
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| adjustment |
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| PLST |
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| 10 15.3 MHz |
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| Reference |
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PLL unlock signal |
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| divider |
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| reference frequency signal |
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| 15.3 MHz | ||
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to the CPU (IC18, pin 73)
5-4 POWER SUPPLY CIRCUITS (MAIN UNIT)
Voltage from the attached battery pack is routed to whole of the circuit in the transceiver via switches and regulators.
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| "ATTERYTPACK | |
!TTACHED OPTIONAL UNITS |
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| 0OWERWSWITCH | |||||
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| 6## | (6 |
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!& AMPLIFIER CONTROLLER |
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&2/.4 5.)4 1 1 $ |
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ETC |
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#050)# |
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| #056 |
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%%02/- )# |
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| REGURATOR |
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| #URRENT |
| 2&25.)45 | ||
ETC |
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!TTACHED OPTIONAL UNITS |
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| SENSOR |
| 1 1 2 | ||
6 |
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$!CONVERTERS |
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| REGURATOR |
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ETC | )# |
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0,,,)# )# |
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| 1 1 1 |
| 48 POWER AMPLIFIERS | |||||||
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| 62%& | 62%& |
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| 2&25.)45141 | ||||||
"ASE BAND )# )# |
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ETC |
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36
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4RANSMITTERMCIRCUITS | 46 | 46 |
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2ECEIVER CIRCUITS |
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36 |
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REGURATOR |
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1 |
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| h2#v |
#05 )#
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