6.5.14 TRAP_ISR

This is a pseudo-command. It cannot be issued directly by the host software, but is executed when an INT3 is executed. The INT3 instruction is used by iECM-86 for implementing software breakpoints and for single-stepping. A separate entry point into the STOP_USER command is provided for the INT3 vector. Code at this entry point sets the TRAP_FLAG and then drops into the code that implements the STOP_USER command.

6.5.15 REPORT_STATUS (Code 14H)

This command loads the least-significant word of the RISM_DATA register with status information. Valid status values are 0, 1, and 2:

0—indicates that user code is stopped (RUN_FLAG and TRAP_FLAG are both

FALSE)

1—indicates that user code is running (RUN_FLAG is TRUE)

2—indicates that user code executed a TRAP instruction (TRAP_FLAG is TRUE)

The host software periodically polls the target system to check on its status, and this polling can rob execution time from the user’s program. This loss of target processor cycles can be avoided by setting the Ring Indicator modem status line signal whenever the RUN_FLAG is set. The host software assumes that the target is running user code whenever it detects the ring indicator and issues REPORT_STATUS commands only if the ring indicator is off.

6.5.16 MONITOR_ESCAPE (Code 15H)

This command provides for the addition of RISM commands for special purposes; it uses the RISM_DATA register to extend the command set of the RISM. The basic RISM requires only one of these “extended” commands; if the lower 16-bits of the RISM_DATA register is one (RISM_DATA = 0XXXX0001H), the target processor should execute either a RST (ReSeT) instruction or a software initialization routine.

6.5.17 READ_BPORT (Code 16H)

This command reads the 8-bit input port pointed to by the RISM_ADDR register and places the result in the least-significant byte of the RISM_DATA register.

6.5.18 WRITE_BPORT (Code 17H)

This command stores the least-significant byte of the RISM_DATA register in the 8-bit out- put port pointed to by the RISM_ADDR register.

6.5.19 READ_WPORT (Code 18H)

This command reads the 16-bit input port pointed to by the RISM_ADDR register and places the result in the least-significant word of the RISM_DATA register.

Page 74 Page 76
Page 75
Image 75
Intel 80C186EB, 80L188EC Trapisr, Reportstatus Code 14H, Monitorescape Code 15H, Readbport Code 16H, Writebport Code 17H
Page 74 Page 76

80L188EB, 80C188EC, 80C188EB, 80L186EB, 80C186EB specifications

The Intel 80L188EC, 80C186EC, 80L186EC, 80C186EB, and 80L186EB microprocessors represent a significant evolution in Intel's 16-bit architecture, serving various applications in embedded systems and computing during the late 1980s and early 1990s. These microprocessors are designed to offer a blend of performance, efficiency, and versatility, making them suitable for a range of environments, including industrial control, telecommunications, and personal computing.

The Intel 80L188EC is a member of the 186 family, notable for its low-power consumption and integrated support for a range of peripheral devices. It operates at clock speeds of up to 10 MHz and features a 16-bit architecture, providing a balance of processing power and energy efficiency. The 80C186EC, on the other hand, is a more advanced version, offering enhanced performance metrics with faster clock speeds and improved processing capabilities, making it ideal for applications that require more computational power.

The 80L186EC shares similarities with the 80L188EC but is enhanced further for various low-power applications, especially where battery life is crucial. With a maximum clock speed of 16 MHz, it excels in scenarios demanding energy-efficient processing without sacrificing performance.

In contrast, the 80C186EB and 80L186EB are optimized versions that bring additional features to the table. The 80C186EB operates at higher clock speeds, coupled with an extended instruction set, enabling it to handle more complex tasks and run sophisticated software. These enhancements allow it to serve well in environments that require reliable performance under load, such as data acquisition systems or advanced control systems.

The 80L186EB is tailored for specific low-power scenarios, integrating Intel's sophisticated low-power technologies without compromising on speed. Utilizing advanced process technologies, these chips benefit from reduced heat output and extended operating life, a significant advantage in embedded applications.

Overall, these microprocessors showcase Intel's commitment to innovation in 16-bit processing, marked by their varying capabilities and power profiles tailored to meet the demands of diverse applications, from industrial systems to consumer electronics. Their legacy continues to influence subsequent generations of microprocessor designs, emphasizing performance, energy efficiency, and versatile applications in computing technology. As such, the Intel 80C186 and 80L188 families play a crucial role in understanding the evolution of microprocessor technology.
Top Page Image Contents