5
8xC251Tx Hardware Description
VCC2 PWR Secondary Supply Voltage 2. This supply voltage connect ion is pro-
vided to reduce power supply noise. Conne cti on of this sp in to th e
+5V supply voltage is recommended. However, when using the ZX3
as a pin for pin rep lacement for the 8X C51FX, VCC2 can b e uncon-
nected without loss of compatibility ( Not available on DIP).
VSS GND Circuit Ground. Connect this pin t o ground.
VSS1 GND Secondary Ground. This ground is provided to reduce ground
bounce and improve pow er supply bypassing. Connection of this pin
to ground is recommended. However, when using the ZX3 as a pin
for pin replacement for the 8XC 51F X , VSS1 can be unconnected with-
out loss of compatib ility. (Not available in DIP).
VSS2 GND Secondary Ground 2. T his ground is provided to reduce ground
bounce and improve pow er supply bypassing. Connection of this pin
to ground is recommended. However, when using the ZX3 as a pin
for pin replacement for the 8XC 51F X , VSS1 can be unconnected with-
out loss of compatib ility. (Not available in DIP).
WAIT# IReal-time Wait State I npu t. T he real - tim e WAIT# input is enable d by
writing a logical "1" to the WCON.0 (RTWE) bit at S:A7H. Du ring bus
cycles, the external memo ry system can signal ‘sys tem ready’ to the
microprocessor in real time by controlling the WAIT# input signal
P1.6/CEX3
WCLK OWait Clock Output. The real-t ime Wait Clock output is dr iven by writ-
ing a logical "1" to the WCON.1 (RT WCE) bit at S:A7H. Wh en
enabled, the WCLK output produces a square wave signa l with a
period of one-half th e oscillator freq uency
P1.7/CEX4/
A17
WR# OWrite. Write signal output to external memory. Asserted for the mem -
ory address range s pecified by config uration byte UCON FIG0, bits
RD1:0.
P3.6
XTAL1 IInput to On-chip, Inverting Oscillator A mplifier. To use the internal
oscillator, a cr ystal/resonator circuit is connected to this pin. If an
external oscillato r is us ed , it s o utpu t is co nn ecte d t o thi s p in . XTAL1 is
the clock source for the int ernal timing
XTAL2 OOutput of the On-chip, Inverting O scillator Amplifier. To use the
internal oscillato r , a cr ys t al/ reso na t or ci rcu it i s conn ec te d to th is pi n. I f
an external oscillat or is used, leave X TAL2 unconnected.
Table 2. 8xC251Tx Signal Descriptions (She et 3 of 3)
Signal
Name Type Description Alternate
Function
* The description s of A15:8/P2.7:0 and AD7:0/P0.7:0 are for non page mod e configuration. If configured in
page mode, Port 0 ca rries the lower a ddress bits (A7:0) and Port 2 carries the upper address bits (A15:8)
and the data (D7:0)