Intel 8XC251SA, 8XC251SB, 8XC251SP, 8XC251SQ, 8xC251TB, 8xC251TQ 3.0 THE SECOND SERIAL I/O PORT

8xC251Tx Hardware Description

3.0 THE SECOND SERIAL I/O PORT

The second serial I/O port is functionally the same as the standard serial I/O port shared by both the

8xC251Tx and the 8xC251Sx. This section provides information about the new special function registers

(SFRs) associated w ith the second serial po rt. Detailed operatio n and programming of the serial I/O ports can

be obtained from Chapter 10 of the 8xC251SA, 8xC251SB, 8xC251SP, 8xC251SQ Embedded Microcon-

troller User’s Manual (272795). All the SFRs and control bits for th e standard serial I/ O port in both the

8xC251Sx and 8xC251Tx have an equivalent in the se co nd se r ia l I/O po r t. T h is sho ul d be kept in mind when

referencing Chapte r 10 of the 8xC251SA, 8xC251SB, 8xC251SP, 8xC251SQ Embedded Microcontroller

User’s Manual (272795).

The second serial I/O port provides synchr onous and asynchronous communications modes. It operates as a

universal asynchron ous receiver and transmit ter (UART) in th ree full-duple x modes (mod es 1, 2 and 3).

Asynchronous transmission and reception can occur simultaneously and at different baud rates. The second

UART provides framing-bit error detection, multiprocessor communications and automatic address recog-

nition. The second serial port also op erates in a single synchronous mode (mode 0).

The synchronous mod e (m o d e 0) op erates at a single bau d ra t e. Mo de 2 operates at two baud r ate s . Mo de s

1 and 3 operate over a wide range of frequencies, which are generated by Timer 1 and Timer 2.

The second serial I/O port signals are defined in Table 4 and the special function registers are described in

Table 5.

For the three asynchronous modes, the second serial I/O port transmit s on the TXD1 pin and receives on the

RXD1 pin. For the synchronous mode (mode 0), the second ser ial I/O port output s a clock signal on the TXD1

pin and sends and recei ves messages on the RXD1 pin. The SBUF1 register holds r eceived bytes and bytes

to be transmitted. To send, software writes a by te to SBUF 1; t o re c eiv e , s oftwa re rea ds SBU F 1. Th e re ce ive

shift register allows reception of a second byte before the first byte has been read from SBUF1. However, if

software has not read the first by te by the time the second byte is received, the second byte will overwrite the

first. The second serial I/O port sets interrupts bits TI1 and RI1 on transmission and reception, respectively.

These two share a singl e interrupt request and interrupt vector.

The serial port control 1 (SCON1) and the secondary serial port control (BGCON) registers configures and

controls the second serial I/O port.

Table 4. Second Serial I/O Port Signals

Function

Name Type Description Multiplexed

With

TXD1 OTransmit Serial D at a. TXD1 outputs the shift clock in serial I/O mode

0 and transmits ser ial data in serial I/ O modes 1, 2 and 3 for the sec-

ond serial I/O por t

P1.3/CEX0

RXD1 I/O Receive Serial Dat a 1. RXD1 send and receives data in serial I/O

mode 0 and receiv es data in serial I/O modes 1, 2 and 3 f or the sec-

ond serial I/O por t

P1.2/ECI

Intel 3.0 THE SECOND SERIAL I/O PORT