Intel AP440FX specifications Main System Memory, Chipset, Parity and ECC Dram

Models: AP440FX

1 74
Download 74 pages 47.24 Kb
Page 12
Image 12

AP440FX Motherboard Technical Product Specification

1.6 Main System Memory

The motherboard has four 72-pin tin-lead SIMM sockets that make it possible to install up to

128 MB of RAM. The sockets support 1M x 32 (4 MB) single-sided modules, 2M x 32 (8 MB), 4M x 32 (16 MB), and 8M x 32 (32 MB) single- or double-sided modules. Minimum memory size is 8 MB and maximum memory size, using four 8M x 32 SIMM modules, is 128 MB. Memory timing requires 60 ns fast page devices or, for optimum performance, 60 ns EDO DRAM. Both parity and non-parity memory modules are supported. With parity SIMMs, the board can be configured to support ECC operation.

The four sockets are arranged in two banks of two sockets each. The sockets are designated Bank 0 and Bank 1. Each bank provides a 64/72-bit wide data path. Both SIMMs in a bank must be of the same memory size and type, although the types and sizes of memory may differ between banks. Bank 0 only, Bank 1 only, or both of the banks may be populated. There are no jumper settings required for the memory size or type, which is automatically detected by the BIOS. Use only tin lead SIMMs when adding DRAM.

1.6.1DRAM

EDO (or Hyper Page) DRAM is designed to improve the DRAM read performance. EDO DRAM holds the memory data valid until the next memory access cycle, unlike standard fast page mode DRAM that tri-states the memory data when the precharge cycle occurs, prior to the next memory access cycle.

1.6.2Parity and ECC DRAM

Memory error checking and correction is supported by parity SIMMs. With parity SIMMs, the board can be configured to support ECC memory operation. Parity SIMMs are automatically detected, but the user must enter Setup to configure the SIMMs for either Parity or ECC operation. Parity memory detects single bit errors. ECC memory detects double bit errors and corrects single bit errors. Errors may be generated by a defective memory module, by different speeds of memory modules, or by DMA or memory conflicts.

1.7 Chipset

The Intel 82440FX PCIset consists of the 82441FX PCI Bridge and Memory controller (PMC) and the 82442FX Data Bus Accelerator (DBX). The Intel 82371SB PCI ISA/IDE Xccelerator (PIIX3) bridge, provides the connection between the ISA and PCI buses.

1.7.182441FX PCI Bridge and Memory Controller (PMC)

The 82441FX comes in a 208 pin QFP package and provides the following features:

Microprocessor interface control

Pentium Pro processor host bus up to 66 MHz

32-bit addressing

12

Page 12
Image 12
Intel AP440FX Main System Memory, Chipset, Parity and ECC Dram, 1 82441FX PCI Bridge and Memory Controller PMC