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Intel IQ80333 3.9.6.8Jumper J7B4 SMBus Header, 3.9.6.9Jumper J9D3 Buzzer Volume Control, Table

Models: IQ80333

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Intel® IQ80333 I/O Processor

Hardware Reference Section

3.9.6.8Jumper J7B4: SMBus Header

Table 37.	Jumper J7B4: Descriptions

	Jumper	Description	Factory Default

	J7B4	SMBus Header	1-2, 3-4

Table 38.	Jumper J7B4: Settings and Operation Mode

	J7B4	Operation Mode

	Pins 1, 2	Connects SM_SCLK to EEPROM U7B2 (Default Mode).

	Pins 3, 4	Connects SM_SDTA to EEPROM U7B2 (Default Mode).

	Pins 5, 6	Connects SM_SCLK to GE_SMCLK (for GBE control)

	Pins 7, 8	Connects SM_SDTA to GE_SMDAT(for GBE control)r

	Pins 9, 10	Connects SM_SCLK to PE_SMCLK (for PCI-E bus control)

	Pins 11, 12	Connects SM_SDTA to PE_SM_SDAT (for PCI-E bus control)

3.9.6.9Jumper J9D3: Buzzer Volume Control

Table 39.	Jumper J9D3: Descriptions

	Jumper	Description	Factory Default

	J9D3	Buzzer Volume	Open

Table 40.	Jumper J9D3: Settings and Operation Mode

	J9D3	Operation Mode

	Pins 2, 3	Buzzer Volume Soft

	Pins 1, 2	Buzzer Volume Loud.

	NC	Buzzer Volume Off.

44	Customer Reference Board Manual

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Intel IQ80333 3.9.6.8Jumper J7B4 SMBus Header, 3.9.6.9Jumper J9D3 Buzzer Volume Control, Jumper J7B4 Descriptions, Table

Contents

February Customer Reference Board ManualIntel IQ80333 I/O Processor February Intel IQ80333 I/O ProcessorCustomer Reference Board Manual Contents ContentsIntroduction Intel IQ80333 I/O ProcessorContents Intel IQ80333 I/O Processor3.7.1 Customer Reference Board ManualCustomer Reference Board Manual ContentsIntel IQ80333 I/O Processor Figures ContentsIntel IQ80333 I/O Processor Customer Reference Board ManualTables ContentsIntel IQ80333 I/O Processor Customer Reference Board ManualRevision History ContentsIntel IQ80333 I/O Processor Customer Reference Board Manual1.2Other Related Documents Introduction1.1Document Purpose and Scope 1.3Electronic Information 1.4Component ReferencesIntroduction Electronic Information1.5Terms and Definitions Terms and DefinitionsIntel IQ80333 I/O Processor IntroductionIntroduction 1.6Intel 80333 I/O ProcessorIntel IQ80333 I/O Processor 80333 I/O Processor Block Diagram Intel+,*+ Intel IQ80333 I/O ProcessorSummary of Features FeatureIntel IQ80333 I/O Processor Introduction2.1Kit Content 2.2Hardware Installation2.2.1First-TimeInstallation and Test Getting StartedIntel IQ80333 I/O Processor 2.2.2Power RequirementsGetting Started 2.3Factory Settings 2.4.2Contents of the Flash2.4Development Strategy 2.4.1Supported Tool Buckets2.5.1RedHat RedBoot 2.5Target MonitorsIntel IQ80333 I/O Processor Getting Started2.6Host Communications Examples 2.6.1Serial-UARTCommunication2.6.2JTAG Debug Communication Figure 2. Serial-UARTCommunication2.6.3Network Communication Figure 4. Network Communication ExampleIntel IQ80333 I/O Processor Getting Started2.6.4.1Communicating with RedBoot 2.6.4GNUPro GDB/InsightIntel IQ80333 I/O Processor Getting StartedGetting Started HyperTerminal setup screensIntel IQ80333 I/O Processor 2.6.4.2Connecting with GDB xscale-elf-gdb -nwhello1GDB set remotebaud GDB target remote /dev/ttyS0Getting Started This Page Left Intentionally BlankIntel IQ80333 I/O Processor 3.1Functional Diagram Hardware Reference SectionHardware Reference Section IntelTable 6. Form-Factor/ConnectivityFeatures 3.2Board Form-Factor/ConnectivityFigure 6. Board Form Factor Intel IQ80333 I/O Processor3.3Power Power Features3.4.1.1Battery Backup 3.4Memory Subsystem3.4.1DDR SDRAM Intel IQ80333 I/O Processor3.4.2Flash Memory Requirements Table 8. Flash Memory RequirementsIntel IQ80333 I/O Processor Hardware Reference SectionHardware Reference Section 3.5Interrupt RoutingIntel IQ80333 I/O Processor Table 10. Peripheral Bus Features Intel IQ80333 I/O ProcessorHardware Reference Section Customer Reference Board ManualTable 11. Flash ROM Features 3.6.1Flash ROMFlash Connection on Peripheral Bus Flash3.6.6Rotary Switch Table 12. Rotary Switch Requirements3.6.2UART 3.6.3Non-VolatileRAM3.6.7Battery Status Battery Status Buffer RequirementsIntel IQ80333 I/O Processor Hardware Reference Section3.7Debug Interface 3.7.1Console Serial PortIntel IQ80333 I/O Processor Hardware Reference Section3.7.2JTAG Debug 3.7.2.1JTAG PortJTAG Port Pin-out Intel IQ80333 I/O Processor3.8Board Reset Scheme Table 14. Reset Requirements/SchemesFigure 10. RESET Sources DDR II SDRAM3.9Switches and Jumpers 3.9.1Switch Summary3.9.2Default Switch Settings of S7A1- Visual Switch Summary3.9.4Connector Summary Connector Summary3.9.3Jumper Summary 3.9.5General Purpose Input/Output Header3.9.6Detail Descriptions of Switches/Jumpers 3.9.6.2Switch S6A1 BPCI-XReset3.9.6.3Switch S8A1 Rotary 3.9.6.4Switch S7A1Customer Reference Board Manual Intel IQ80333 I/O ProcessorHardware Reference Section Intel IQ80333 I/O Processor Hardware Reference SectionS7A1-6 Operation ModeJumper J1C1: Settings and Operation Mode Jumper J1D2 Settings and Operation Mode3.9.6.5Jumper J7D1 Flash bit-width 3.9.6.6Jumper J1C1 JTAG Chain3.9.6.9Jumper J9D3 Buzzer Volume Control Jumper J7B4 Settings and Operation ModeJumper J9D3 Settings and Operation Mode 3.9.6.8Jumper J7B4 SMBus HeaderSoftware Reference 4.1DRAM4.2Components on the Peripheral Bus Software Reference4.2.1Flash ROM Figure 12. Flash Connection to Peripheral BusIntel I/O Processor Flash 28F640J3C 16-bit 8 Mb4.2.2Peripheral Bus Memory Map Peripheral Bus Memory MapIntel IQ80333 I/O Processor Software Reference4.3Board Support Package BSP Examples 4.3.1Intel 80333 I/O Processor Memory MapFigure 13. Intel 80333 I/O Processor Memory Map Intel IQ80333 I/O ProcessorSoftware Reference 4.3.3RedBoot Intel 80333 I/O Processor FilesIntel IQ80333 I/O Processor Initialization Sequence Intel IQ80333 I/O ProcessorSoftware Reference IQ80321 and IQ80333 Comparisons IQ80321 and IQ80333 ComparisonsIntel IQ80321 Evaluation Platform Board and FeaturesIQ80321 and IQ80333 Comparisons This Page Left Intentionally BlankIntel IQ80333 I/O Processor the Macraigor Raven JTAG connector, and the Getting Started and DebuggerB.1 Introduction B.1.1 PurposeGetting Started and Debugger B.1.4 Related Web SitesIntel IQ80333 I/O Processor B.2 Setup B.2.1 Hardware SetupIntel IQ80333 I/O Processor Getting Started and DebuggerB.2.2 Software Setup Figure 15. Software Flow DiagramIntel IQ80333 I/O Processor Getting Started and DebuggerB.3 New Project Setup B.3.1 Creating a New ProjectIntel IQ80333 I/O Processor Getting Started and DebuggerConfiguration B.3.2Intel IQ80333 I/O Processor Getting Started and DebuggerB.4 Flashing with JTAG B.4.1 OverviewIntel IQ80333 I/O Processor Getting Started and DebuggerGetting Started and Debugger B.4.2 Using Flash ProgrammerIntel IQ80333 I/O Processor B.5 Debugging Out of Flash B.6 Building an Executable File From Example CodeIntel IQ80333 I/O Processor Getting Started and DebuggerB.7.1 Launching and Configuring Debugger B.7 Running the Code Lab DebuggerIntel IQ80333 I/O Processor Getting Started and DebuggerB.7.4 Using Breakpoints B.7.3 Displaying Source CodeIntel IQ80333 I/O Processor Getting Started and DebuggerB.7.6 Setting Code Lab Debug Options B.7.5 Stepping Through the CodeIntel IQ80333 I/O Processor Getting Started and DebuggerB.8 Exploring the Code Lab Debug Windows B.8.1 Toolbar IconsB.8.2 Workspace Window B.8.3 Source CodeB.8.6 Registers Window B.8.7 Watch WindowB.8.8 Variables Window Intel IQ80333 I/O ProcessorB.9 Debugging Basics B.9.1 OverviewB.9.2 Hardware and Software Breakpoints B.9.2.1 Software BreakpointsGetting Started and Debugger B.9.3 Exceptions/TrappingIntel IQ80333 I/O Processor

3.9.6.8Jumper J7B4: SMBus Header

Jumper J7B4: Descriptions

Jumper J7B4: Settings and Operation Mode

J7B4

3.9.6.9Jumper J9D3: Buzzer Volume Control

Jumper J9D3: Descriptions

Jumper J9D3: Settings and Operation Mode

J9D3