CHAPTER 3 - BIOS SETUP
Description | Choice |
CAS Latency Time |
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When synchronous DRAM is installed, the |
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number of clock cycles of CAS latency depends |
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on the DRAM timing. Do not reset this field |
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from the default value specified by the system |
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designer. |
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You can select CAS latency time in HCLK of |
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2/2 or 3/3. The system board designer should set |
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the values in this field, depends on the DRAM |
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installed specifications of the installed DRAM |
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or the installed CPU. |
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Active to Precharge delay |
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Select the precharge delay timer. |
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DRAM RAS# to CAS# delay |
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This field lets you insert a timing delay between |
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the CAS and RAS strobe signals, used when |
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DRAM is written to, read from, or refreshed. |
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Fast gives faster performance; and Slow gives |
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more stable performance. This field applies only |
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when synchronous DRAM is installed in the |
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system. |
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DRAM RAS# Precharge |
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The precharge time is the number of cycles it |
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takes for the RAS to accumulate its charge |
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before DRAM refresh. If insufficient time is |
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allowed, refresh may be incomplete and the |
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DRAM may fail to retain data. |
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SYS7180VE User’s Manual | 35 |
CHAPTER 3 - BIOS SETUP
Description |
| Choice |
|
|
|
Memory Frequency for
Select the memory frequency for DDR200/DDR266 when install the memory with specification of DDR200, or when install the memory with specification of DDR266, or Auto define by the BIOS.
System BIOS Cacheable
Selecting Enabled allows caching of the system BIOS ROM at
Video BIOS Cacheable
Selecting Enabled allows caching of the video BIOS ROM at C0000h to C7FFFh, resulting in better video performance. However, if any program writes to this memory area, a system error may result.
Memory Hole At 15M-16M
You can reserve this area of system memory for ISA adapter ROM. When this area is reserved, it cannot be cached. The user information of peripherals that need to use this area of system memory usually discusses their memory requirements.
36 | SYS7180VE User’s Manual |