Intel TFX12V Output Protection, Rise Time, Overshoot at Turn-on / Turn-off, Reset after Shutdown

TFX12V Power Supply Design Guide

Thin Form Factor with 12 V Connector

Version 2.0

2.3.5Rise Time

The output voltages shall rise from ≤10% of nominal to within the regulation ranges specified in Section 2.2.1 within 0.2 ms to 20 ms (0.2 ms ≤ T2 ≤ 20 ms).

There must be a smooth and continuous ramp of each DC output voltage from 10% to 90% of its final set point within the regulation band, while loaded as specified in Section 2.2.1.

The smooth turn-on requires that, during the 10% to 90% portion of the rise time, the slope of the turn-on waveform must be positive and have a value of between 0 V/ms and [Vout, nominal / 0.1] V/ms. Also, for any 5 ms segment of the 10% to 90% rise time waveform, a straight line drawn between the end points of the waveform segment must have a slope ≥ [Vout, nominal / 20] V/ms.

2.3.6Overshoot at Turn-on / Turn-off

The output voltage overshoot upon the application or removal of the input voltage, or the assertion/de- assertion of PS_ON#, under the conditions specified in Section 3.1, shall be less than 10% above the nominal voltage. No voltage of opposite polarity shall be present on any output during turn-on or turn-off.

2.3.7Reset after Shutdown

If the power supply latches into a shutdown state because of a fault condition on its outputs, the power supply shall return to normal operation only after the fault has been removed and the PS_ON# has been cycled OFF/ON with a minimum OFF time of one second.

2.3.8+5 VSB at AC Power-down

After AC power is removed, the +5 VSB standby voltage output should remain at its steady state value for the minimum hold-up time specified in Section 2.2.12 until the output begins to decrease in voltage. The decrease shall be monotonic in nature, dropping to 0.0 V. There shall be no other disturbances of this voltage at or following removal of AC power.

2.4 Output Protection

2.4.1Over Voltage Protection

The over voltage sense circuitry and reference shall reside in packages that are separate and distinct from the regulator control circuitry and reference. No single point fault shall be able to cause a sustained over voltage condition on any or all outputs. The supply shall provide latch-mode over voltage protection as defined in Table 15.

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