H
ARDWARE
R
EFERENCE
G
UIDE
MICRO
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LINE
®
C6713CPU
Date : 28 November 2005
Doc. no. : C6713CPU_HRG
Iss./Rev : 1.1
Page : 53
BSP board support package: a combination of software and FPGA design that provides
further functionality to the C6713CPU
CCS Code Composer Studio –TI's development environment
CPU Central Processing Unit = processor
DMA direct memory access – a fast data transfer method
DSP Digital Signal Processor
e.g. exempli gratia (Latin) = for example
yEMI electromagnetic interference
EMIF external memory interface – a peripheral of the TMS320C6713 DSP
FPGA field programmable gate array
HPI host port interface – a peripheral of the TMS320C6713 DSP
i.e. id est (Latin) = that is
I2C inter integrated circuit – a low speed interface between integrated circuits
KB 1024 byte
LED light emitting diode
LSB least significant bit
MB 1024 KB = 1048576 byte
MSB most significant bit
McASP multi-channel audio serial port – a peripheral of the TMS320C6713 DSP
McBSP multi-channel buffered serial port – a peripheral of the TMS320C6713 DSP
N.A. not available / not applicable
N.C. not connected
PLD programmable logic device
RAM random access memory
ROM read only memory
SRAM static random access memory
SDRAM synchronous dynamic random access memory
TBC to be changed = value not 100% tested and may change in future
TBD to be defined = value is not yet specified
TI Texas Instruments
UART universal asynchronous receiver transmitter