Kane Industries C6713CPU

ARDWARE

EFERENCE

UIDE

MICRO

LINE

C6713CPU

Date : 28 November 2005

Doc. no. : C6713CPU_HRG

Iss./Rev : 1.1

Page : 33

shared with Default

signal name Interface signal

micro-line® connector

CLKX0 ACLKX0 E23

FSX0 AFSX0 E25

DX0 AXR0[1] E21

CLKR0 ACLKR0 E22

FSR0 AFSR0 E24

DR0 AXR0[0] E20

CLKS0

McASP0

AHCLKR0 E19

CLKX1 McASP0 AMUTE0 E13

FSX1 E15

DX1 AXR0[5] E11

CLKR1 AXR0[6] E12

FSR1

McASP0

AXR0[7] E14

DR1 SDA1 E10

CLKS1

I2C

SCL1 E16

Table 12: Pinout summary for the McBSP interfaces

shared with Default

signal name interface signal

micro-line® connector

TOUT0 AXR0[2] E28

TINP0 AXR0[3] E18

TOUT1 AXR0[4] E29

TINP1

McASP0

AHCLKX0 E17

Table 13: Pinout summary for the timers

shared with Default

signal name interface signal

micro-line® connector

SCL0 BB31

SDA0

BB32

SCL1 CLKS1 E16

SDA1

McBSP1

DR1 E10

Table 14: Pinout summary for the I2C interfaces

Contents

Main Hardware Reference Guide micro-line C6713CPU High performance DSP / FPGA board Page Page Page Page C6713CPU 1 Preface 1.1 Document Organization 1.2 Documentation Overview 1.3 Notational conventions C6713CPU 1.4 Trademarks Page 2 Hardware Overview Page Page 2.2 Connectors 2.3 Interfaces and Hardware Components C6713CPU Page 2.4 Status LED's 2.5 DSP peripherals Page Page Page 3 Memory Maps and Description of the PLD Registers 3.1 TMS320C6713 Memory Map 3.2 C6713CPU Address Map 3.3 Internal fast SRAM 3.4 DSP Peripherals 3.5 External SDRAM 3.7 Endianness 3.8 EMIF Configuration 3.9 Description of the PLD Board Registers 3.10 Description of the PLD Registers Page Page Page Page 4 Boot Process and Default Setup of the C6713CPU 5 Using the Flash File System 6 Description of the micro-line Board Connectors Table 11: Pinout of the micro-line connectors 6.3 Pinout Tables of the micro-line Page Page 6.4 Pinout of the JTAG Connector FPGA J TAG connec tor DSP JTAG connecto r (fits TI emulator POD) top view 6.5 Function of the micro-line Connector Pins Page Page Page Page Page Page Page 7 Environment 7.1 Minimum Connections Date : 28 November 2005 Doc. no. : C6713CPU_HRG Iss./Rev : 1.1 Page : 45 D standard PC RS-232 connector Sub-D 9pin socket; fits directly into a PC front view Figure 9: Connecting the serial interface (RS-232) to a PC 7.2 Changing the Board Configuration Page 7.3 Signal Levels and Loads 7.4 Supply Voltage 7.5 Power Consumption 7.6 Reset Timing 7.7 Ambient Temperature 7.9 Dimensions of the Board Date : 28 November 2005 Doc. no. : C6713CPU_HRG Iss./Rev : 1.1 Page : 51 Figure 13: Complete micro-line footprint 7.10 Spare micro-line Connectors 8 List of abbreviations used in this document 9 Literature references