![](/images/new-backgrounds/1110176/110176131x1.webp)
Specifications
Parallel Port Pin Assignments
Pin | Signal Name | Source |
1 | H | |
2 | +Data 1 | |
3 | +Data 2 | |
4 | +Data 3 | |
5 | +Data 4 | |
6 | +Data 5 | |
7 | +Data 6 | |
8 | +Data 7 | |
9 | +Data 8 | |
10 | - ACK | P |
11 | + Busy | P |
12 | + Paper Error | P |
13 | + Select | P |
14 | - Auto Feed | H |
15 | Not Defined |
|
16 | Logic GND |
|
17 | Chassis GND |
|
18 | Peripheral Logic High | P |
GND |
| |
31 |
| H |
32 |
| P |
| Not Defined |
|
36 |
| H |
∗Data signals will be driven by some but not all peripheral devices.
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