Microsoft IBUS-BAT-1370 Sdram CAS Latency Time, Dram Data Integrity Mode, System Bios Cacheable

Award BIOS Setup Utility

SDRAM CAS Latency Time

The default setting is 3 which is 3 clock cycles for the CAS latency.

DRAM Data Integrity Mode

The ECC (Error Checking and Correction) function is supported only in x72 (72-bit) PC SDRAM DIMMs. If you are using x64 (64-bit) PC SDRAM DIMMs, set this field to Non-ECC.

Non-ECC Uses x64 PC SDRAM DIMM.

ECC This option allows the system to recover from memory failure. It detects single-bit and multiple-bit errors, then automatically corrects single-bit error.

System BIOS Cacheable

When this option is enabled, accesses to the system BIOS ROM addressed at F0000H-FFFFFH are cached, provided that the cache controller is enabled. The larger the range of the Cache RAM, the higher the efficiency of the system.

Video BIOS Cacheable

As with caching the system BIOS, enabling the Video BIOS cache will allow access to video BIOS addresssed at C0000H to C7FFFH to be cached, if the cache controller is also enabled. The larger the range of the Cache RAM, the faster the video performance.

Video RAM Cacheable

When enabled, it allows the video RAM to be cacheable thus providing better video performance. If your graphics card does not support this function, leave this field in its default setting - Disabled.

8 Bit I/O Recovery Time and 16 Bit I/O Recovery Time

The recovery time is the length of time, measured in SYSCLK, which the system will delay after the completion of an input/output request. This delay takes place because the CPU is operating so much faster than the input/output bus that the CPU must be delayed to allow for the completion of the I/O. This item allows you to determine the recovery time allowed for 8-bit I/O or 16-bit I/O.

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