▶DRAM Ratio
This setting controls the ratio of memory frequency to enable the memory to run at dif- ferent frequency combinations.
▶Adjusted DRAM Frequency
It shows the adjusted DRAM frequency.
Select whether DRAM timing is controlled by the SPD (Serial Presence Detect) EE- PROM on the DRAM module. Setting to [Auto] enables DRAM timings and the following “Advanced DRAM Configuration”
▶Advanced DRAM Configuration Press <Enter> to enter the
▶Command Rate
This setting controls the DRAM command rate.
▶tCL
This controls the CAS latency, which determines the timing delay (in clock cycles) before SDRAM starts a read command after receiving it.
▶tRCD
When DRAM is refreshed, both rows and columns are addressed separately. This setup item allows you to determine the timing of the transition from RAS (row ad- dress strobe) to CAS (column address strobe). The less the clock cycles, the faster the DRAM performance.
▶tRP
This setting controls the number of cycles for Row Address Strobe (RAS) to be allowed to precharge. If insufficient time is allowed for the RAS to accumulate its charge before DRAM refresh, refreshing may be incomplete and DRAM may fail to retain data. This item applies only when synchronous DRAM is installed in the system.
▶tRAS
This setting determines the time RAS takes to read from and write to memory cell. ▶tRFC
This setting determines the time RFC takes to read from and write to a memory cell.
▶tWR
Minimum time interval between end of write data burst and the start of a precharge command. Allows sense amplifiers to restore data to cells.
▶tWTR
Minimum time interval between the end of write data burst and the start of a col-
