National Instruments NI PCI-6110, NI PCI-6111 UPDATE* Signal

Chapter 4 Connecting Signals

© National Instruments Corporation 4-29 NI PCI-6110/6111 User Manual

UPDATE* Signal

Any PFI pin can externally input the UPDATE* signal, which is available

as an output on the PFI5/UPDATE* pin.

As an input, UPDATE* is configured in the edge-detection mode. You can

select any PFI pin as the source for UPDATE* and configure the polarity

selection for either rising or falling edge. The selected edge of UPDATE*

updates the outputs of the DACs. In order to use UPDATE*, you must set

the DACs to posted-update mode.

As an output, UPDATE* reflects the actual update pulse that is connected

to the DACs, even if the updates are being externally generated by another

PFI. The output is an active low pulse with a pulse width of 50 to 75ns.

This output is set to high-impedance at startup.

Figures4-24 and 4-25 show the timing requirements for UPDATE*.

Figure 4-24. UPDATE* Input Signal Timing

Figure 4-25. UPDATE* Output Signal Timing

The DACs are updated within 100ns of the leading edge. Separate the

UPDATE* pulses with enough time that new data can be written to the

DAC latches.

Rising-Edge

Polarity

Falling-Edge

Polarity

tw = 10 ns minimum

tw

tw = 50 to 75 ns

tw

Contents

Main Page Important Information Warranty Copyright Trademarks Patents Compliance FCC/Canada Radio Frequency Interference Compliance Determining FCC Class FCC/DOC Warnings Class A Contents Chapter 4 Connecting Signals Page About This Manual Conventions National Instruments Documentation Related Documentation Introduction About the NI PCI-6110/6111 What You Need to Get Started Software Programming Choices NI-DAQ National Instruments ADE Software Optional Equipment Custom Cabling Unpacking Safety Information Page Page Installing and Configuring the NI PCI-6110/6111 Installing the Software Installing the Hardware Configuring the Device National Instruments Corporation 3-1 NI PCI-6110/6111 User Manual Hardware Overview DAQ - STC RTSI Bus Figure 3-1. NI PCI-6110 Block Diagram I/O Connector Analog Input Input Mode Note The inputs are differential only in the sense that the ground loops are broken. The I/O Connector RTSI Bus Input Polarity and Input Range Considerations for Selecting Input Ranges Input Coupling Analog Output Analog Trigger Figure 3-3. Analog Trigger Block Diagram for the NI PCI-6110 Figure 3-4. Analog Trigger Block Diagram for the NI PCI-6111 Page Page Digital I/O Timing Signal Routing Page Programmable Function Inputs Device and RTSI Clocks RTSI Triggers Connecting Signals I/O Connector Figure 4-1. 68-Pin I/O Connector Pin Assignment for the NI PCI-6110/6111 Figure 4-2. 50-Pin Connector Pin Assignments for the NI PCI-61 10/6111 I/O Connector Signal Descriptions Table 4-2. Signal Descriptions for I/O Connector Pins Page Page Table 4-3. I/O Signal Summary for the NI PCI-6110/6111 Table 4-3. I/O Signal Summary for the NI PCI-6110/6111 (Continued) Connecting Analog Input Signals Types of Signal Sources Floating Signal Sources Ground-Referenced Signal Sources Differential Measurements Differential Connection Considerations Differential Connections for Ground-Referenced Signal Sources Figure 4-4. Differential Input Connections for G round-Referenced Signals Differential Connections for Nonreferenced or Floating Signal Sources Common-Mode Signal Rejection Considerations Working Voltage Range Analog Output Signal Connections Digital I/O Signal Connections Power Connections Timing Connections Programmable Function Input Connections DAQ Timing Connections TRIG1 Signal TRIG2 Signal Page STARTSCAN Signal Page CONVERT* Signal AIGATE Signal SISOURCE Signal SCANCLK Signal EXTSTROBE* Signal Waveform Generation Timing Connections WFTRIG Signal UPDATE* Signal UISOURCE Signal General-Purpose Timing Signal Connections GPCTR0_SOURCE Signal GPCTR0_GATE Signal GPCTR0_OUT Signal GPCTR0_UP_DOWN Signal GPCTR1_SOURCE Signal GPCTR1_GATE Signal GPCTR1_OUT Signal GPCTR1_UP_DOWN Signal Page FREQ_OUT Signal Field Wiring Considerations Page Calibration Loading Calibration Constants Self-Calibration External Calibration A Specifications Analog Input Input Characteristics Accuracy Information Transfer Characteristics Amplifier Characteristics Dynamic Characteristics Stability Analog Output Output Characteristics Transfer Characteristics Voltage Output Dynamic Characteristics Stability Digital I/O Timing I/O General-Purpose Up/Down Counter/Timers Frequency Scaler Triggers Analog Trigger Digital Trigger External Input for Digital or Analog Trigger (PFI0/TRIG1) Page Environmental Safety Electromagnetic Compatibility CE Compliance Page Figure B-1. 68-Pin Connector Pin Assignment for the NI PCI-611 0/6111 Figure B-2. 50-Pin Connector Pin Assignment for the NI PCI-611 0/6111 C Common Questions General Information Installing and Configuring Analog Input and Output Timing and Digital I/O Page Page D Technical Support and Professional Services Page Glossary Numbers/Symbols A B C D E F G H I K L M N O P Page R S T U V W Index Symbols Numerics A B C D E F G H I K L M N O Q R S T U V W