Chapter 4 Connecting Signals
© National Instruments Corporation 4-33 NI PCI-6110/6111 User Manual
GPCTR0_UP_DOWN Signal
This signal can be externally input on the DIO6 pin and is not available as
an output on the I/O connector. The general-purpose counter 0 counts down
when this pin is at a logic low and counts up when it is at a logic high. You
can disable this input so that software controls the up-down functionality
and leaves the DIO6 pin free for general use.
GPCTR1_SOURCE Signal
Any PFI pin can externally input the GPCTR1_SOURCE signal, which is
available as an output on the PFI3/GPCTR1_SOURCE pin.
As an input, GPCTR1_SOURCE is configured in the edge-detection mode.
You can select any PFI pin as the source for GPCTR1_SOURCE and
configure the polarity selection for either rising or falling edge.
As an output, GPCTR1_SOURCE monitors the actual clock connected to
general-purpose counter 1, even if the source clock is being externally
generated by another PFI. This output is set to tri-state at startup.
Figure4-30 shows the timing requirements for GPCTR1_SOURCE.
Figure 4-30. GPCTR1_SOURCE Signal Timing
The maximum allowed frequency is 20MHz, with a minimum pulse width
of 10 ns high or low. There is no minimum frequency limitati on.
The 20MHz or 100 kHz timebase normally generates the
GPCTR1_SOURCE unless you select some external source.
tw = 10 ns minimum
tp = 50 ns minimum
tp
twtw