ExSync
Camera Input
LineValid
Camera Output
Notes specific to this mode
1Unlike Freerunning mode, the user triggers (separately) both the CAM/CMOS - 2K.LS readout cycle, and the CAM/CMOS - 2K.LS
reset-&-integration cycle. All of the modes other than Freerunning mode allow the user to do this
2 The user initiates a readout cycle by taking ExSync low as shown above. Readout actually begins a time
"tXFR" after ExSync is taken low, and lasts 2048 clock cycles
3 The user can read data from the CAM/CMOS - 2K.LS while LineValid is high as shown above and explained in Figure 3.4.1
4 The reset-&-integration cycle to be read out in the next period "n+1" is initiated by ExSync returning high;
integration begins when reset is complete a time "tReset" after ExSync goes high, and continues
for the remainder of "tLinePeriod". The user can therefore shorten integration time by increasing "tHold" above
5 The line period is set by the user by returning ExSync low, thereby initiating the next "n+1th" readout cycle
6The minimum time that ExSync can be held low is "tMinSync" as shown above
7 Integration is cut off when the user takes ExSync low again as shown in the waveforms above
8The line period must be greater than or equal to "tReadout" plus tXfr", which sets maximum line rate to 50K lines/sec
9 If the user brings the ExSync Camera Input low prior to "tXFR" + "tReadout" after ExSync goes low, then the CAM/CMOS
2K.LS delays initiation of the "n+1th" readout cycle until "tReadout"+ "tXFR" has elapsed after ExSync last went low
Table 3.4.3 -- Mode 2: ExSync Synchronization
...gives the user asynchronous hardware control over initiation of the camera readout cycle
and over termination of the line period...
...separately gives the user asynchronous hardware control
tXFR
tLinePeriod
tReadout
2048 Clock Cycles
tReset2 tIntegration
nn+1
Data Camera Output
Strobe Camera Output
Line Valid Camera Output
1 2 3 2047 2048
>tMinSync
tHold
Fairchild Imaging • CAM/CMOS-2K.LS Line Scan Camera User’s Manual • Rev A • 21 of 41