Tegra 200 Series Developer Board User Guide

Figure 9. Crystal Connection Example

Table 6 Crystal and Circuit Requirements

Symbol

Parameter

Min

Typ

Max

Unit

FP

Parallel resonance crystal Frequency

 

12

 

MHz

FTOL

Frequency Tolerance

 

±50

 

ppm

 

 

 

 

 

 

CL

Load Capacitance for crystal parallel resonance

5

7

10

pf

DL

Crystal Drive Level

 

 

300

uW

 

 

 

 

 

 

RBIAS

External Bias Resistor

 

2

 

MΩ

 

 

 

 

 

 

ESR

Equivalent Series Resistance

 

 

80

Ω

 

 

 

 

 

 

Note: FP, FTOL, CL and DL are found in the Xtal Datasheet

ESR = RM * (1 + C0/CL)/2 where RM = Motional Resistance, C0 =Shunt Capacitance from Xtal datasheet. Datasheets may specify ESR directly – consult manufacturer if unclear whether ESR or RM are specified.

Load capacitor values (CLx) can be found with formula CL = [(CL1xCL2)/(CL1+CL2)]+CPCB

Or since CL1 and CL2 are typically of equal value, CL = (CLx/2)+CPCB. or CLx = (CL – CPCB) x 2 CL = Load capacitance (Xtal datasheet). CPCB is PCB capacitance (trace, via, pad, etc.)

DG-04927-001_v01

Advance Information – Subject to Change

21

 

NVIDIA CONFIDENTIAL