Nvidia DG-04927-001_V01 4.6.2 HDMI, 4.6.2.1 Unused Pins

Tegra 200 Series Developer Board User Guide

4.6.2 HDMI

ƒHDMI_RSET on the Tegra 250 is tied to ground through a 1KΩ, 1% resistor

ƒDDC_SCL/SDA pins are 5V tolerant (no level shifter required). I2C pull-ups connect to 5V supply.

ƒHP_DET drives HDMI_INT (interrupt pin) on the Tegra 250 (Also 5V tolerant - no level shifter required).

Figure 17: HDMI Connection Example

Table 11. HDMI Pinout

Signal	Pin	Signal	Pin
HDMI_TXCN	AF17	HDMI_TXD1N	AC18
HDMI_TXCP	AG17	HDMI_TXD1P	AD18
HDMI_TXD0N	AE16	HDMI_TXD2N	AH18
HDMI_TXD0P	AE17	HDMI_TXD2P	AG18

4.6.2.1 Unused Pins

Any unused signal lines can be left unconnected. If HDMI is not implemented, AVDD_HDMI/HDMI_PLL rails and all signal pins can be left unconnected.

DG-04927-001_v01	Advance Information – Subject to Change	29
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