Tegra 200 Series Developer Board User Guide
Table 8. ULPI Pinout
Signal | Pin |
| Signal | Pin |
ULPI_CLK | M2 |
| ULPI_DATA2 | N4 |
ULPI_DIR | M3 |
| ULPI_DATA3 | L3 |
ULPI_NXT | M1 |
| ULPI_DATA4 | L4 |
ULPI_STP | P3 |
| ULPI_DATA5 | L6 |
ULPI_DATA0 | P4 |
| ULPI_DATA6 | P5 |
ULPI_DATA1 | P6 |
| ULPI_DATA7 | N6 |
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4.5.3 PCIe
The remaining two downstream USB interfaces on the Tegra 200 Series Developer Board are each routed to one of the Mini- PCIe connectors shown. One use for
Contact NVIDIA for a list of certified PCI express peripherals.
Figure 14. Example LAN9514 USB/Ethernet Hub and Dual
Advance Information – Subject to Change | 26 | |
| NVIDIA CONFIDENTIAL |
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