Tegra 200 Series Developer Board User Guide
4.8.2 eMMC Device Connections
The SD/MMC interface can support a variety of flash memory devices. The Tegra 200 Series Developer Board uses a combination
Figure 21. Tegra 200 Series Developer Board Reference design
VDDIO_NAND
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Tegra | Ω47K |
| Ω47K |
| Ω47K |
| Ω47K |
| Ω10K |
| Ω47K |
| Ω47K |
|
|
|
|
|
|
|
|
|
|
|
|
|
0.1uf
Ω47K | Ω47K |
GND_EMI2
GMI_AD24 GMI_AD25 GMI_AD22 GMI_AD23
HSMMC_DAT4
HSMMC_DAT5
HSMMC_DAT2
HSMMC_DAT3
D4
D5
D2
D3
GMI_DPD
GMI_CS5_N
HSMMC_CMD
HSMMC_CLK
CMD
GND
VDD
CLK
GND
GMI_AD20
HSMMC_DAT0
HSMMC_DAT1
D0
D1
GMI_AD21 GMI_AD26 GMI_AD27
HSMMC_DAT6
HSMMC_DAT7
The Tegra 200 Series Developer Board uses this socket to as an internal means to support assorted boot/storage devices including eMMC. This header is included to provide a core supply to an eMMC module. Not needed if eMMC or other device directly
eMMC Core (2.85V)
D6
D7
D2
D3
CMD
GND
| VDD | |
0.1uf | CLK | |
GND | ||
| ||
| D0 | |
| D1 |
GMI_AD10 GMI_AD11
GPIO_PH2 (HSMMC_CD_N)
GPIO_PH3 (HSMMC_WP)
C_DETECT_N
WP_N
GND_EMI2
VDDIO_NAND 3.3V
Advance Information – Subject to Change | 33 | |
| NVIDIA CONFIDENTIAL |
|