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Philips ISP1520 Philips Semiconductors ISP1520, 9.2 Device descriptors and string descriptors settings using I2C-bus,

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Philips Semiconductors ISP1520

Hi-Speed USB hub controller

Product data Rev. 03 — 24 November 2004 15 of 51

9397 750 13701 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.

The detection of any non-removable port sets the hub descriptor into a compound

hub.

9.1.5 Port indicator support

The port indicator support can be disabled by grounding all green port indicators (all

pins GRNn_N); see Tab le 9. This is a global feature. It is not possible to disable port

indicators for only one port.

9.2 Device descriptors and string descriptors settings using I2C-bus

9.2.1 Background information on I2C-bus

The I2C-bus is suitable for bi-directional communication between ICs or modules. It

consists of two bi-directional lines: SDA for data signals and SCL for clock signals.

Both these lines must be connected to a positive supply voltage through a pull-up

resistor.

The basic I2C-bus protocol is deﬁned as:

•Data transfer is initiated only when the bus is not busy.

•Changes in the data line occur when the clock is LOW and must be stable when

the clock is HIGH. Any changes in data lines when the clock is HIGH will be

interpreted as control signals.

Different conditions on I2C-bus: The I2C-bus protocol deﬁnes the following

conditions:

Not busy — both SDA and SCL remain HIGH

START —a HIGH-to-LOW transition on SDA, while SCL is HIGH

STOP — a LOW-to-HIGH transition on SDA, while SCL is HIGH

Data valid — after a STARTcondition, data on SDA must be stable for the durationof

the HIGH period of SCL.

Data transfer: The master initiates each data transfer using a START condition and

terminates it by generating a STOP condition. Tofacilitate the next byte transfer,each

byte of data must be acknowledgedby the receiver. The acknowledgement is done by

pulling the SDA line LOW on the ninth bit of the data. An extra clock pulse needs to

be generated by the master to accommodate this bit.

For more detailed information on the operation of the bus, refer to

The I

2

C-bus

speciﬁcation

.

Table 8: Non-removable port pin conﬁguration

AMBn_N (n=1to4) Non-removable port

Ground non-removable

Pull-up with amber LED removable

Table 9: Port indicator support: pin conﬁguration

GRN1_N to GRN4_N Port indicator support

Ground not supported

LED pull-up green LED for at least one port supported

Contents

Main ISP1520 Hi-Speed Universal Serial Bus hub controller Universal Serial Bus Specication Rev.2.0 Rev. 03 24 November 2004 Product data 1. General description 2. Features Universal Serial Bus Specication Rev.2.0 3. Applications 4. Abbreviations 5. Ordering information Product data Rev. 03 24 November 2004 4 of 51 6. Block diagram Fig 1. Block diagram. ISP1520 Philips Semiconductors ISP1520 Product data Rev. 03 24 November 2004 5 of 51 7. Pinning information ISP1520BD Fig 2. Pin conguration. 7.2 Pin description 7.1 Pinning Page ISP1520 Hub Demo Board Users Guide Page 8. Functional description 8.3 Phase-locked loop clock multiplier 8.4 I2C-bus controller 8.5 Overcurrent detection circuit 8.6 GoodLink 8.7 Power-on reset Fig 4. External clock with respect to power-on reset. Fig 3. Power-on reset timing. Stable external clock is to be available at A. POR EXTERNAL CLOCK A 9. Conguration selections 9.1 Conguration through I/O pins Page Philips Semiconductors ISP1520 9.2 Device descriptors and string descriptors settings using I2C-bus The I C-bus specication Page 9.2.3 ROM or EEPROM map Page Page Philips Semiconductors ISP1520 Page 10. Hub controller description 11. Descriptors Page Page 12. Hub requests Tab le 23 shows the suppor ted standard USB requests. 12.1 Standard USB requests 12.2 Hub class requests Tab le 24 shows the hub class requests. 12.3 Detailed responses to hub requests Page Page 12.4 Various get descriptors bmRequestType 10000000B bmRequest GET_DESCRIPTOR = 6 13. Limiting values 14. Recommended operating conditions In accordance with the Absolute Maximum Rating System (IEC 60134). 15. Static characteristics Page Page 16. Dynamic characteristics C; test circuit Figure 21; unless otherwise specied. Page TPERIOD is the bit duration corresponding with the USB data rate. Fig 11. Source differential data-to-EOP transition skew and EOP width. TPERIOD is the bit duration corresponding with the USB data rate. tJR is the jitter reference point. Fig 13. Receiver SE0 width tolerance. Fig 12. Receiver differential data jitter. Fig 14. Hub differential data delay and SOP distortion. Fig 15. Hub EOP delay and EOP skew. and T within recommended operating range; V 5 V; V =V ; V 17. Application information 17.1 Descriptor conguration selection ISP1520 Fig 18. Adjusting analog overcurrent detection limit (optional). ISP1520 17.3 Self-powered hub congurations ISP1520 Fig 19. Self-powered hub; individual port power switching; individual overcurrent detection. Fig 20. Self-powered hub; ganged port power switching; global overcurrent detection. ISP1520 18. Test information DMn D Fig 22. Full-speed test circuit. Fig 21. High-speed transmitter and receiver test circuit. 19. Package outline LQFP64: plastic low profile quad flat package; 64 leads; body 10 x 10 x 1.4 mm SOT314-2 Fig 23. LQFP64 package outline. c 20. Soldering 20.1 Introduction to soldering surface mount packages Data Handbook IC26; Integrated Circuit Packages 20.2 Reow soldering 20.3 Wave soldering 21. Revision history Contact information 22. Data sheet status 23. Denitions 24. Disclaimers 25. Licenses 26. Trademarks Contents